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Current wireless communication devices demand multi-band/multi-standard receiver that can access all the available services specifications. This work introduces a tunable receiver front-end for multi-band multi-standard applications. The receiver adopts a down-conversion quadrature band-pass FIR charge sampling mixer tuned via its controlling clocks. A time varying impedance matching network provides further selectivity. The architecture is simulated over three different frequencies spanning two octaves (2G, 1G and 500MHz) targeting LTE specifications. The proposed design is tested across process corners and post layout. Simulations result in Noise Figure of 7.5 to 9 dB, out-of-band IIP3 of -1.9 to -7 dBm, in-band IIP3 of -1.5 to -10 dBm and S11 <-10dB. The design is implemented using 65nm CMOS technology I.978-1-4799-8391-9/15/$31.00 ©2015 IEEE

This paper presents a digitally controlled RF charge sampling receiver font-end architecture for multiband multi standard RF receivers. A time-varying matching network is proposed instead of traditional ones. The receiver operates in charge domain to produce a band pass Sinc filter centered at the desired local oscillator frequency. A time varying matching network provides tunable matching and selectivity to support multi-bands. This receiver architecture targets LTE band (0.7-2.7) GHz making use of its programmability. Based on a verilogA model, the receiver conversion gain is 33 dB at 2 GHz; the resulting noise figure is 7.3dB, and P1dB and IIP3 of -10dBm are 0 dBm respectively.

The desire of having applications covering all service specifications tremendously increases the demand for multi-band multi-standard receivers. A programmable receiver front-end architecture for multi-band multi-standard receivers is proposed. The receiver adopts a down-conversion quadrature band-pass FIR charge sampling mixer programmed via its controlling clocks. A time varying impedance matching network provides further selectivity. The architecture is simulated over three different frequencies spanning two octaves (2G, 1G and 500MHz) targeting LTE specifications. The proposed design achieves conversion gain of 23dB to 28dB, Noise Figure (NF) of 7dB to 9dB, out of band IIP3 of -1.9dBm to -5.6dBm, in band IIP3 of -1.5dBm to -5.7dBm and S11 <-10 dB. The design is implemented using a 65nm CMOS technology.I.