The Canary instrument is a miniature electrostatic analyzer designed to detect positively charged ions in the energy range 0-1500 eV. The Canary concept began with the development of a Micro-Electro-Mechanical (MEMS) Flat Plasma Spectrometer (FlaPS), which, integrated with electronics onto FalconSAT-3, reduced the size and mass of an ion plasma spectrometer to about 10x10x10 cm 3 and 250 g. The successor to FlaPS was the Wafer Integrated Spectrometer (WISPERS), expanding the same instrument to seven sensors all with uniquely optimized energy ranges and azimuth/elevation look angles. WISPERS is due to fly on the USAF Academy's FalconSAT-5 satellite scheduled for launch in Spring 2010. FlaPS and WISPERS created a paradigm shift in the use of such instruments in a highly capable but small, low power package. The third generation, Canary (named after the "canary in the coal mine" -an earlier technology used to provide low-cost, effective warning of danger to operators), will be flown on the International Space Station (ISS) and used to investigate the interaction of approaching spacecraft with the background plasma environment around the ISS.

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Discovery mission to explore the composition of the comets Encke and Schwassmann-Wachmann 3. The DPU design employs an advanced electronic packaging approach with 3-D interconnect that provides flexibility to accommodate future expansion and modification by simply adding or replacing one of its modules. It achieves the most efficient volume and weight and also reduces cost. Miniaturization of space electronics involves considerations beyond the usual requirements for small size and low mass. A system approach must be developed and started with the top down deliberations on the design of an electronic architecture suitable for miniaturizing all physical aspects of the electronics design, and continued with considerations at the board, component and chips levels. One important task that has often been ignored, in an electronic package design, is the selection of the connectors and the interconnect architecture between the individual boards. This paper will describe the DPU packaging design, the selection process of the interconnect architecture, and the reliability evaluation of the press-fit connectors used in this design.

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