A new type of two-dimensional (2D) SnO 2 semiconductor-based gate-tunable memristor, that is, a memtransistor, an integrated device of a memristor and a transistor, was demonstrated to advance next-generation neuromorphic computing technology. The polycrystalline 2D-SnO 2 memristors derived from a low-temperature and vacuum-free liquid metal process offer several interesting resistive switching properties such as excellent digital/analog resistive switching, multistate storage, and gatetunability function of resistance switching states. Significantly, the gate tunability function that is not achievable in conventional twoterminal memristors provides the capability to implement heterosynaptic analog switching by regulating gate bias for enabling complex neuromorphic learning. We successfully demonstrated that the gate-tunable synaptic device dynamically modulated the analog switching behavior with good linearity and an improved conductance change ratio for high recognition accuracy learning. The presented gate-tunable 2D-oxide memtransistor will advance neuromorphic device technology and open up new opportunities to design learning schemes with an extra degree of freedom.

The absence of a high-performance p-channel oxide thin-film transistor (TFT) is the major challenge faced in the current oxide semiconductor device technology. Simple solution-based back-channel subgap defect termination using sulfur was developed for p-channel cuprous oxide (Cu2O)-TFTs. We investigated the origin of poor device characteristics in conventional Cu2O-TFTs and clarified that it was mainly because of a back-channel donor-like defect of ∼2.8 ×1013 cm–2 eV–1, which originated from the interstitial Cu defect. Sulfur ion treatment using thiourea effectively reduced the back-channel defect down to <3 × 1012 cm–2 eV–1 and demonstrated the Cu2O-TFT with a saturation mobility of 1.38 ± 0.7 cm2 V–1 s–1, a s-value of 2.35 ± 1.22 V decade–1, and an on/off current ratio of ∼4.1 × 106. The improvement of device characteristics was attributed to the reduction of back-channel defect by the formation of a thin CuSO4 back-channel passivation layer by the chemical reaction of interstitial Cu with S and O ions. An oxide-based complementary inverter using a p-channel Cu2O-TFT and a n-channel a-In–Ga–Zn–O-TFT was demonstrated with a high voltage gain of ∼230 at V DD = 70 V.

Low-cost inorganic solution processing for oxide semiconductor thin-film transistors (TFTs) is crucial for developing next-generation cost-effective, ubiquitous, and flexible electronics, and the development of low-temperature solution-processed high-performance oxide-TFTs is highly demanded. We developed a simple oxidation promotion step using sodium hydroxide (NaOH) for the low-temperature solution processing of n-channel stannic oxide (SnO2)-TFTs. The presented SnO2-TFTs were fabricated using a low-cost inorganic salt (SnCl2) solution at a maximum process temperature of 200 °C under an ambient atmosphere; they exhibited good TFT characteristics with a reasonably high saturation mobility of ∼6.7 cm2 V–1 s–1, a small s-value of ∼210 mV dec–1, and a high on/off-current ratio of ∼108. We found that the NaOH solution dipping step effectively assisted in enhancing the oxidation of Sn ions and enabled the fabrication of a device-quality SnO2 channel at low temperatures. We also fabricated enhancement/depletion-mode TFTs and developed a solution-processed SnO2-TFT-based zero-V GS-load inverter exhibiting a full-swing characteristic with a high voltage gain of ∼198, a narrow transition width of ∼0.88 V, and a static power dissipation of ∼0.12 μW.

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