An experimental digital repeatered line has been developed which transmits information at a rate of 224 Mb/8 as part of an experimental highspeed digital transmission system. The PCM terminals and time division multiplex portions were described by J. S. Mayo and others in the November 1965 issue of the Bell System Technical Journal. The repeatered line is described in this paper. The performance of this line is shown to be suitable for coast‐to‐coast operation. The line utilizes 0.270‐inch copper coaxial transmission lines and regenerative repeaters at one‐mile intervals. Ten repeaters have been operated in tandem to form ten miles of repeatered line. Each repeater uses 25 transistors, most of them a new germanium design with a cutoff frequency, ft, of 4 GHz. Esaki diodes provide the decision thresholds for the regeneration. Power to the repeaters is supplied by dc over the center coaxial conductor. The pulse transmission code is paired selected ternary (PST).

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A Picturephone® network will take maximum advantage of existing telephone equipment. To provide service, a new videotelephone set will be added to a Touch‐Tone® telephone installation. Video access lines (loops) to the serving central office will be provided using additional regular wire pairs, appropriately equalized. Arrangements are being provided for extending PBX and key telephone customer switching arrangements to have a Picturephone capability. Central office switching will be accomplished by auxiliary video switches under the control of ordinary switching machines. Short‐haul trunks will be provided on ordinary trunk cables equipped with equalizers as for loops. Long‐haul trunks will make use of existing and planned systems, with additional equipment needed only at the terminals. The network was designed primarily for face‐to‐face communications, but two additional services are being offered at the outset: data communications at 460.8 kb/s and interfacing arrangements for access to a customer's computer. Other new services are in the offing.

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This paper describes a method of rapidly evaluating the switching speed of transistors by means of a fully automatic tester suitable for factory use. A transistor may be plugged into the tester and after a brief settling time, a voltage proportional to the expected switching speed appears on a meter or permanent recording device.Because of the non-linear nature of transistors, the test is restricted by the necessity for making the measurement using a circuit configuration resembling that of the intended application.The direct measurement of switching speed is certainly the most accurate and straightforward method. However, when dealing with speeds of the order of 0.5 p sec.. it would be difficult to instrument an automatic testor using this method. Therefore, a roundabout slower speed method suitable for application in an automatic tester, but with some inherent inaccuracy, was developed.Instead of driving the transistor hard into saturation, the base current (in a common emitter configuration) is of sufficient amplitude to just drive vc(t) from cut-off to saturation. A slow transient resembling an exponential rise and traversing the entire active region results. The vc(t) transient is adjusted by servo means for a least error between it and a reference linear RC exponential rise. The expected switching time i s shown to be proportional to the product of the RC time constant and the base current drive, both adjusted a s described.A representative number of transistors of one type were measured by both direct and automatic meane and the accuracy of the proposed test was shown to be +-20%. Although such accuracy is not sufficient for all applications, it would be suitable for a coarse factory test. It has the advantage of quick and simple operation. 7