No abstract

No abstract

A novel switching scheme using multiple shared memories is proposed. It has low implementation complexity and ideal performance for both uniform traffic and non-uniform traffic without speedup. The proposed algorithm assigns an output time for each incoming data according to its destination and distributes them into 2N shared memories that can be addressable by output time, where N is the number of input/output ports. Experimental results show that the proposed scheme has good performance for both uniform traffic and nonuniform traffic.Introduction: A switch is used to transfer packets from input ports to destination ports. Variable length packets are segmented into fixed length cells for switching. An output buffered switch has ideal throughput performance; however it has high implementation complexity. In the output buffered switch, the memory speed of the output buffers must be N times faster than the link speed for N links. In a buffered crosspoint switch, N 2 queues at the crosspoint and N input queues are required. Combined input and output queuing switches effective for both uniform and non-uniform traffic have high implementation complexity such as 2 ∼ N times switching fabric speedup [1,2]. These switch schemes are inadequate for very high-speed large switches with a large number of ports.

No abstract

This paper proposes an efficient data collection algorithm for active RFID systems. The algorithm can be used for ubiquitous services in maritime logistics adaptation. Conventional algorithms use slotted aloha in ISO 18000-7 or CSMA/CA in DASH 7 mode 2. They show poor throughput performance because they collect all tags at every wakeup round. The proposed algorithm, adapted to maritime logistics, improved the performance by reading the previously collected tags without collision. The newly joined tags are collected by conventional collection algorithm. Experimental results show that the proposed algorithm has better throughput performance than conventional algorithms.