In this paper, a small-area and low-power current readout circuit with a novel two-stage conversion method is presented for 64-channel CNT (carbon nanotube) sensor arrays. In the first stage, current of each CNT sensor is amplified by 64 active input current mirrors (AICMs). In the second stage, the amplified current is converted to a voltage level through the shared variable gain amplifier (S-VGA). Then the S-VGA output is digitalized by successive approximation register analog-to-digital converter (SAR-ADC). The proposed readout circuit significantly reduces chip area and power consumption, since VGA is shared over 64 channels and passive elements are used only in S-VGA. Fabricated chip area is 0.173 mm(2) in 0.13 μm CMOS technology. Measured power consumption and linearity error are 73.06 μW and 5.3%, respectively, at the input current range of 10 nA-10 μA and conversion rate of 640 samples/s. A prototype real-time CNT sensor system was implemented using the fabricated readout circuit, and successfully detected alcohol reaction.

In this paper, the radiated emissions generated by various split power/ground plane structures are studied. The magnetic field and electric field over the designed test pattern are simulated. Each of the results has different field pattern by bandwidth of signal frequency, gap space or gap location of the split ground gap. To reduce the radiated emission, the method for determining the gap space and the gap location are studied based on the return current distributions. Also, the magnetic near-fields are measured by the near field EMI scan over the test board with the different value and location of the stitching capacitors. These results show that the radiated emission on split power/ground structure can be reduced by optimizing its structure. Moreover, the values and locations of the stitching capacitor should be determined to minimize the discontinuity of the return current paths.

We suggest a low area and high efficiency switched-mode power supply (SMPS) with a pulse width modulation (PWM) generator based on a pseudo relaxation-oscillating technique. In the proposed circuit, the PWM duty ratio is determined by the voltage slope control of an internal capacitor according to amount of charging current in a PWM generator. Compared to conventional SMPSs, the proposed control method consists of a simple structure without the filter circuits needed for an analog-controlled SMPS or the digital compensator used by a digitally-controlled SMPS. The proposed circuit is able to operate at switching frequency of 1MHz～10MHz, as this frequency can be controlled from the selection of one of the internal capacitors in a PWM generator. The maximum current of the core circuit is 2.7 mA, and the total current of the entire circuit including output buffer driver is 15 mA at 10 MHz switching frequency. The proposed SMPS has a simulated maximum ripple voltage of 7mV. In this paper, to verify the operation of the proposed circuit, we performed simulation using Dongbu Hitek BCD 0.35μm technology and measured the proposed circuit.

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