The continuous downscaling in CMOS devices has increased leakage power and limited the performance to a few GHz. The research goal has diverted from operating at high frequencies to deliver higher performance in essence with lower power. CMOS based on-chip memories consumes significant fraction of power in modern processors. This paper aims to explore the suitability of beyond CMOS, emerging magnetic memories for the use in memory hierarchy, attributing to their remarkable features like nonvolatility, high-density, ultra-low leakage and scalability. NVSim, a circuit-level tool, is used to explore different design layouts and memory organizations and then estimate the energy, area and latency performance numbers. A detailed system-level performance analysis of STT-MRAM and SOT-MRAM technologies and comparison with 22[Formula: see text]nm SRAM technology are presented. Analysis infers that in comparison to the existing 22[Formula: see text]nm SRAM technology, SOT-MRAM is more efficient in area for memory size [Formula: see text][Formula: see text]KB, speed and energy consumption for cache size [Formula: see text][Formula: see text]KB. A typical 256[Formula: see text]KB SOT-MRAM cache design is 27.74% area efficient, 2.97 times faster and consumes 76.05% lesser leakage than SRAM counterpart and these numbers improve for larger cache sizes. The article deduces that SOT-MRAM technology has a promising potential to replace SRAM in lower levels of computer memory hierarchy.

Explicit expressions for all 2(nd+1) primitive idempotents in the ring

In this paper, a class of Hessenberg matrices is presented for adoption as test matrices. The Moore-Penrose inverse and the Drazin inverse for each member of this class are determined explicitly. 1. Introduction. Most numerical problems associated with solving a system of linear equations involve only rational numbers. However, square matrices over the real number field are considered in this paper. Howell and Gregory [6] have shown how to avoid problems which arise in solving the matrix equation Ax = b as a result of rounding errors in computer schemes. Specifically, they have shown how to use residue arithmetic to avoid ill-conditioned problems. Using a similar approach, Stallings and Boullion [12] have shown how to significantly reduce rounding errors in computer schemes which compute the Moore-Penrose inverse (pseudoinverse) for a given matrix. However, the rounding errors are not necessarily completely eliminated. Chow [2] has presented a class of Hessenberg matrices which may be used as test matrices in checking the accuracy of matrix inversion programs. In this paper, a class of Hessenberg matrices is presented such that the pseudoinverse and Drazin inverse can be explicitly computed for each member. Furthermore, the eigenvalues and eigenvectors are known for the members of this class. Therefore, it appears reasonable that such a class of matrices may be useful as test matrices. 2. Definitions and Notation. One should distinguish between the class of matrices in [2] which are offered as test matrices and the class given below. Only square matrices over the real number field are considered. Definition 2.1. The pseudoinverse of a matrix A is the unique solution A+ of the four matrix equations AaXA = A, XAX = X, (AX)T = AX and (XA)T = XA where ()T denotes the matrix transpose. Definition 2.2. The index of a matrix A is the smallest nonnegative integer lnd(A) = k such that rankL4k) = rank64fc+1). Definition 2.3. The Drazin inverse of a matrix A is the unique solution AD of the three matrix equations AX = XA, XAX = X, Ak+lX=Ak, where lnd(A) = k.

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