Today, pricing of derivates (particularly options) in financial institutions is a challenge. Besides the increasing complexity of the products, obtaining fair prices requires more realistic (and therefore complex) models of the underlying asset behavior. Not only due to the increasing costs, energy efficient and accurate pricing of these models becomes more and more important. In this paper we present -to the best of our knowledge -the first FPGA based accelerator for option pricing with the state-of-the-art Heston model. It is based on advanced Monte Carlo simulations. Compared to an 8-core Intel Xeon Server running at 3.07GHz, our hybrid FPGA-CPU-system saves 89% of the energy and provides around twice the speed. The same system reduces the energy consumption per simulation to around 40% of a fully-loaded Nvidia Tesla C2050 GPU. For a three-Virtex-5 chip only accelerator, we expect to achieve the same simulation speed as a Nvidia Tesla C2050 GPU, by consuming less than 3% of the energy at the same time.

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Portability of software modules is a major concern in application development for Wireless Sensor Networks (WSN), stressed by the typical lack of resources in embedded systems. Abstractions of the hardware platform which are introduced by the operating system (OS) allow the development of modules which can be reused in new applications. However, the lack of standards in this domain, restricts the chances to achieve efficient portability to those systems running on very similar platforms (e.g. same OS).In this paper, we present an Operating System Abstraction Layer (OSAL), which unifies the OS architecture and establishes a common API across multiple OS. Portability of applications is effectively granted thanks to a common set of primitives, which are independent of the underlaying OS and its particular architecture.We highlight the efficiency of the OSAL as well as detailed description of its main features and design considerations. We have implemented the OSAL on top of two well known OS and performed extensive evaluations, which show that it effectively reduces portability efforts at the expenses of minimal run-time overhead as well as negligible increase of memory footprint.

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