No abstract

No abstract

No abstract

In this paper, we demonstrate MG/Fluorinated HfO 2 CMOS device, focusing on interfacial reaction suppression by fluorine passivation at bottom HfO 2 interfaces. "Zero" interfacial layer forms in CMOS compatible gate first fabrication. 48% and 45% driving current enhancement were achieved for nFET and pFET respectively. The interfacial reaction between HfO 2 and Si substrate which caused Fermilevel pinning of MG/HK was sufficiently suppressed due to fluorine passivation of the Si substrate and the blocking of oxygen diffusion into the Si. In addition, a new physical model of fluorine re-incorporation was proposed to explain the NBTI characterization for pre-treated device.

No abstract