Electronically programmable memory devices utilizing molecular self-assembled monolayers are reported. The devices exhibit electronically programmable and erasable memory bits compatible with conventional threshold levels and a memory cell applicable to a random access memory is demonstrated. Bit retention times Ͼ15 min have been observed.

A 576 Mb DRAM is implemented with 16 serial links at 10.3125Gbps. Using careful memory/SerDes/package codesign, the system achieves 14.5ns latency and 24.75GByte/s read/write bandwidth. It achieves SRAM-like random access by using logic-compatible 65nm GP embedded DRAM and small 36 Kb sub-arrays with hidden refresh.