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Design techniques for low-voltage analog TUters In CMOS technologies are discussed. The use of OTA-C implementation techniques towards low power supply voltages (3 V and below) requires special source degeneration and input signal folding techniques. Firstly, design techniques to achieve Pull CMOS continuous-time filters with low distortlon (Total harmonic distortion c -50 dB) and low power supply voltages (3 V) are discussed. The use of switched-capacitor techniques at extremely low voltages (1.5 V) requjre extra care for the switches in the circuit. Special design techniques, such as voltage multlpliers for the clock drivers and single transistor switches, are analyzed to achieve the low power supply speciflcatlons.