We report for the first time experimental investigations on SOI, Si 1-x Ge x OI & GeOI Tunnel FET (TFET). These devices were fabricated using a Fully Depleted SOI CMOS process flow with high k-metal gate stack, enabling 2 decades lower I OFF (~30fA/µm) compared to co-processed CMOS. We successfully solve the TFET bipolar parasitic conduction by a novel TFET architecture, the Drift Tunnel FET (DTFET), with improved OFF state control. Concerning the ON current issue, we improve the SOI p (resp. n) TFET

We report the experimental demonstration of a germanium metal-semiconductor-metal (MSM) photodetector integrated in a SOI rib waveguide. Femtosecond pulse and frequency experiments have been used to characterize those MSM Ge photodetectors. The measured bandwidth under 6V bias is about 25 GHz at 1.55 microm wavelength with a responsivity as high as 1 A/W. The used technological processes are compatible with complementary-metal-oxide-semiconductor (CMOS) technology.

X-ray photoelectron spectroscopy using synchrotron radiation has been used to investigate the HfO2/SiO2 interface chemistry of high-quality 0.6 and 2.5 nm HfO2/0.6 nm SiO2/Si structures. The high energy resolution (0.15 eV) along with the high brightness level allows us to separate, unambiguously, on both Hf 4f and Si 2p core-level spectra, interfacial Hf–silicate bonds from bulk HfO2 and SiO2 contributions, thus making possible subsequent quantitative treatments and modeling of the interfacial layer structure. Careful assessment of the energy shift of the interfacial components shows that Si-rich Hf silicates are present. The underlying assumption that initial-state contribution dominates the observed Si 2p shift is briefly discussed.