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Titanium nitride (TiN) films were tested for their suitability as upper electrodes in metal–oxide–semiconductor (MOS) capacitors and Schottky diodes and as metal gate electrodes in fin field effect transistor devices. TiOxNy formation on TiN surfaces was confirmed by x-ray photoelectron spectroscopy and appears to be associated with exposure of the metal electrodes to ambient air. In order to avoid the formation of TiOxNy and TiO2, a layer of aluminum (Al) was deposited in situ after the TiN deposition. TiN work function was calculated for the devices to study how dipole variation at the interface TiN/SiO2 influences TiN work function. TiOxNy and TiO2 formation at the film surface was found to affect the dipole variations at the TiN/SiO2 interface increasing the dipole influence on MOS structure. Furthermore, the estimated values TiN work function are suitable for complementary metal–oxide–semiconductor (CMOS) technology. Finally, this work had shown that Al/TiN structure can be used in CMOS technology, especially on n-type metal–oxide–semiconductor field effect transistor devices.

pMOS Junctionless (JL) devices were fabricated on Silicon On Insulator (SOI) substrates using gallium (Ga+) Focused Ion Beam (FIB) milling and Al diffusion, to get Si nanowire with p+ doping, respectively. Furthermore, SiO2 and Pt layers were used as gate dielectric and electrodes (gate, drain and source) of Junctionless transistors, respectively, and also were deposited using Ga+ FIB. Width, length and height dimensions of Si nanowire were about 100~300 nm, 4 μm and 200 nm, respectively. Energy Dispersive X-Ray Spectroscopy (EDS) measurements were carried out to confirm the surface composition of Si nanowire, dielectric and electrodes. In addition, from EDS results, Ga incorporation on Si nanowire surface occurred. This incorporation was from Ga+ FIB with no significant damage on Si nanowire. Drain-source current (Id) x drain source voltage (Vds) measurements of JL transistors were carried out, and indicate that the devices are working, like a gated resistor or JL device, with high Pt source and drain contact resistances, which lead to the distortions of Id x Vds curves. However, these distortions can be reduced using a longer time of contact sintering process and a Si nanowire height lower than 50 nm. Finally, our fabrication method using FIB process steps (Si milling, SiO2 and Pt depositions) and Al diffusion can be used to obtain Junctionless devices.

Oxynitrides (SiOxNy) have been used as gate insulators for submicron devices [1]. The present work reports the oxynitride formation at SiO2/Si structure by N2+ implantation at low energies. Si substrates were implanted with N2+ ion beams (energy = 5.6 keV and dose =1×10 ions/cm2), annealed at 950°C for 30 min in N2 ambient, oxidized at 950°C in O2 + 1% TCE environment and annealed at 950°C for 30 min in N2. After these process steps, the oxynitride formation was investigated by FTIR, SIMS and ellipsometric analysis. These physical characterizations revealed the presence of Si-0 and Si-N bonds. The film thicknesses and refractive indexes were 7 nm and 1.62, respectively. The dielectric constant = 4.39 and effective charge density = 7xl010 cm–2 were determined by C-V, indicating that the SiOxNy films formed are suitable gate insulators for MOS devices.