Enhanced electron cooling is demonstrated in a strained-silicon/superconductor tunnel junction refrigerator of volume 40 um^3. The electron temperature is reduced from 300 mK to 174 mK, with the enhancement over an unstrained silicon control (300 mK to 258 mK) being attributed to the smaller electron-phonon coupling in the strained case. Modeling and the resulting predictions of silicon-based cooler performance are presented. Further reductions in the minimum temperature are expected if the junction sub-gap leakage and tunnel resistance can be reduced. However, if only tunnel resistance is reduced, Joule heating is predicted to dominate.Comment: 3 pages, 5 figure

Suspended crystalline Ge semiconductor structures are created on a Si(001) substrate by a combination of epitaxial growth and simple patterning from the front surface using anisotropic underetching. Geometric definition of the surface Ge layer gives access to a range of crystalline planes that have different etch resistance. The structures are aligned to avoid etch-resistive planes in making the suspended regions and to take advantage of these planes to retain the underlying Si to support the structures. The technique is demonstrated by forming suspended microwires, spiderwebs and van der Pauw cross structures. We finally report on the low-temperature electrical isolation of the undoped Ge layers. This novel isolation method increases the Ge resistivity to 280 cm at 10 K, over two orders of magnitude above that of a bulk Ge on Si(001) layer, by removing material containing the underlying misfit dislocation network that otherwise provides the main source of electrical conduction.

The control of electronic and thermal transport through material interfaces is crucial for numerous micro and nanoelectronics applications and quantum devices. Here we report on the engineering of the electro-thermal properties of semiconductor-superconductor (Sm-S) electronic cooler junctions by a nanoscale insulating tunnel barrier introduced between the Sm and S electrodes. Unexpectedly, such an interface barrier does not increase the junction resistance but strongly reduces the detrimental sub-gap leakage current. These features are key to achieving high cooling power tunnel junction refrigerators, and we demonstrate unparalleled performance in silicon-based Sm-S electron cooler devices with orders of magnitudes improvement in the cooling power in comparison to previous works. By adapting the junctions in strain-engineered silicon coolers we also demonstrate efficient electron temperature reduction from 300 mK to below 100 mK. Investigations on junctions with different interface quality indicate that the previously unexplained sub-gap leakage current is strongly influenced by the Sm-S interface states. These states often dictate the junction electrical resistance through the well-known Fermi level pinning effect and, therefore, superconductivity could be generally used to probe and optimize metal-semiconductor contact behaviour.