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This paper explores a continuous time (CT) sigma delta (AEÁ) analog-to-digital converter (ADC) based on a dual-voltage-controlled oscillator (VCO)-quantizer-loop structure. A third-order¯lter is adopted to reduce quantization noise and VCO nonlinearity. Even-order harmonics of VCO are signi¯cantly reduced by the proposed dual-VCO-quantizer-loop structure. The prototype with 10 MHz bandwidth and 400 MHz clock rate is designed using a 0.18 m RF CMOS process. Simulation results show that the signal-to-noise ratio and signal-to-noise distortion ratio (SNDR) are 76.9 and 76 dB, respectively, consuming 37 mA at 1.8 V. The key module of the ADC, which is a 4-bit VCO-based quantizer, can convert the voltage signal into a frequency signal and quantize the corresponding frequency to thermometer codes at 400 MS/s. J CIRCUIT SYST COMP 2013.22. Downloaded from www.worldscientific.com by UNIVERSITY OF GUELPH on 03/22/15. For personal use only. VCO-Based CT §¢ ADC 1340013-3 J CIRCUIT SYST COMP 2013.22. Downloaded from www.worldscientific.com by UNIVERSITY OF GUELPH on 03/22/15. For personal use only. VCO-Based CT §¢ ADC 1340013-7 J CIRCUIT SYST COMP 2013.22. Downloaded from www.worldscientific.com by UNIVERSITY OF GUELPH on 03/22/15. For personal use only. VCO-Based CT §¢ ADC 1340013-9 J CIRCUIT SYST COMP 2013.22. Downloaded from www.worldscientific.com by UNIVERSITY OF GUELPH on 03/22/15. For personal use only.