In this paper we present a FPGA design of a digital predistorter (DP) for power amplifiers (PAs) regarding memory effects. As model description the baseband Volterra series are utilized. A reduction of Volterra coefficients can be achieved using their symmetry properties. An advantage of our DP approach is a direct offline model identification, without need to analytically or iteratively calculate a PA model inverse. The DP implementation is very flexible and saves FPGA ressources. Our simulation and measurement results show a good linearization performance applying simple Volterra model structures. DP with and without memory are compared

A method for identifying the Volterra model of a nonlinear power amplifier with memory is given. It first requires the estimation of the Volterra structure. The coefficients of the discrete-time series can then be calculated using a least-squares criterion, based on the known input and measured output samples. In the measurement part, an identified Volterra model is compared to the simpler quasi-memoryless model, described by a Taylor series. Second, two power amplifiers are compared by simulations and verified by measurements

Multi-band multi-standard Base Stations (BS) are believed to be one promising solution to manage the coexistence of different technological standards (e.g. 2G/3G/4G) with reasonable installation and operation costs. Except for multi-technology baseband (BB) units and multi-band/broadband RF-frontends e.g. antenna and Power Amplifier (PA), the realization of such BSs requires sophisticated cooperation between digital BB and analog components to reduce frontend costs and to enhance energy efficiency, flexibility and transmission quality. Such a concept is called "Smart RF". In this paper, we investigate the prototype implementation of practical digital signal processing techniques for performance enhancement of the RF-frontends and analog BB components in multi-band multi-standard transmitters. These techniques include the digital compensations of I/Q-imbalance, modulator (MOD) DC-offset and PA nonlinearity. A prototype platform is described where realtime impairment compensation circuits are implemented. Practical implementation issues incl. complexity and synchronization are discussed. Finally, experimental measurements are presented, which verify the effectiveness of the implemented Smart RF techniques.