An analog CMOS vision chip for edge detection with power consumption below 20 mW was designed by adopting electronic switches. An electronic switch separates the edge detection circuit into two parts: one is a logarithmic compression photocircuit, and the other is a signal processing circuit for edge detection. The electronic switch controls the connection between the two circuits. When the electronic switch is off, it can intercept the current flow through the signal processing circuit and restrict the magnitude of the current flow below several hundred nA. The estimated power consumption of the chip, with 128 × 128 pixels, was below 20 mW. The vision chip was designed using 0.25 µm 1-poly 5-metal standard full custom CMOS process technology.

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A bio‐inspired vision chip for edge detection was fabricated using 0.35 μm double‐poly four‐metal complementary metal‐oxide‐semiconductor technology. It mimics the edge detection mechanism of a biological retina. This type of vision chip offer several advantages including compact size, high speed, and dense system integration. Low resolution and relatively high power consumption are common limitations of these chips because of their complex circuit structure. We have tried to overcome these problems by rearranging and simplifying their circuits. A vision chip of 160×120 pixels has been fabricated in 5×5 mm2 silicon die. It shows less than 10 mW of power consumption.

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