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In emerging and future high-end processor systems, tolerating increasing cache miss latency and properly managing memory bandwidth will be critical to achieving high performance. Prefetching, in both hardware and software, is among our most important available techniques for doing so; yet, we claim that prefetching is perhaps also the least well-understood.Thus, the goal of this study is to develop a novel, foundational understanding of both the benefits and limitations of hardware and software prefetching. Our study includes: source code-level analysis, to help in understanding the practical strengths and weaknesses of compiler-and software-based prefetching; a study of the synergistic and antagonistic effects between software and hardware prefetching; and an evaluation of hardware prefetching training policies in the presence of software prefetching requests. We use both simulation and measurement on real systems. We find, for instance, that although there are many opportunities for compilers to prefetch much more aggressively than they currently do, there is also a tangible risk of interference with training existing hardware prefetching mechanisms. Taken together, our observations suggest new research directions for cooperative hardware/software prefetching.

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The first on-wafer integration of Si(100) MOSFETs and AlGaN/GaN high electron mobility transistors (HEMTs) is demonstrated. To enable a fully Si-compatible process, we fabricated a novel Si(100)-GaN-Si(100) virtual substrate through a wafer bonding and etch-back technique. The high thermal stability of nitride semiconductors allowed the fabrication of Si MOSFETs on this substrate without degrading the performance of the GaN epilayers. After the Si devices were fabricated, the nitride epilayer is exposed, and the nitride transistors are processed. By using this technology, GaN and Si devices separated by less than 5 µm from each other have been fabricated, which is suitable for building future heterogeneous integrated circuits.