Abstract. The determination of upper bounds on execution times, commonly called WorstCase Execution Times (WCETs), is a necessary step in the development and validation process for hard real-time systems. This problem is hard if the underlying processor architecture has components such as caches, pipelines, branch prediction, and other speculative components. This article describes different approaches to this problem and surveys several commercially available tools and research prototypes.

In this article we give an overview of the Worst-Case Execution Time (WCET) analysis research performed by the WCET group of the ASTEC Competence Center at Uppsala University. The basis for this work is our modular architecture for a WCET tool, used b oth to identify the components of the overall WCET analysis problem, and as a starting point for the development of an industry strength WCET tool prototype. Within this framework we have proposed solutions to several key problems in WCET analysis, including representation and analysis of the control ow of programs, modeling of the behavior and timing of pipelines and other low-level timing aspects, integration of the control ow information and low-level timing to obtain a safe and tight WCET estimate, and validation of our tools and methods. We have focussed on the needs of embedded realtime systems in designing our tools and directing our research. Our long-term goal is to provide WCET analysis as a part of the standard tool chain for embedded development (together with compilers, debuggers, and simulators). This is substantially facilitated by our close cooperation with the embedded systems programming-tools vendor IAR Systems.

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