To achieve exascale computing, fundamental hardware architectures must change. The most significant consequence of this assertion is the impact on the scientific applications that run on current high performance computing (HPC) systems, many of which codify years of scientific domain knowledge and refinements for contemporary computer systems. In order to adapt to exascale architectures, developers must be able to reason about new hardware and determine what programming models and algorithms will provide the best blend of performance and energy efficiency into the future. While many details of the exascale architectures are undefined, an abstract machine model is designed to allow application developers to focus on the aspects of the machine that are important or relevant to performance and code structure. These models are intended as communication aids between application developers and hardware architects during the co-design process. We use the term proxy architecture to describe a parameterized version of an abstract machine model, with the parameters added to elucidate potential speeds and capacities of key hardware components. These more detailed architectural models are formulated to enable discussion between the developers of analytic models and simulators and computer hardware architects. They allow for application performance analysis and hardware optimization opportunities. In this report our goal is to provide the application development community with a set of models that can help software developers prepare for exascale. In addition, use of proxy architectures, through the use of proxy architectures, we can enable a more concrete exploration of how well application codes map onto the future architectures.
The rapid development of quantum computing in the NISQ era urgently demands a low-level benchmark suite for conveniently evaluating and verifying the properties of selective prototype hardware, the efficiency of different assemblers, optimizers and schedulers, the robustness of distinct error correction technologies, and the performance of various quantum simulators on classical computers. In this paper, we fill this gap by proposing a low-level, light-weighted, and easy-to-use benchmark suite called QASMBench based on the OpenQASM assembly representation. It collects commonly seen quantum algorithms and routines from a variety of domains including chemistry, simulation, linear algebra, searching, optimization, quantum arithmetic, machine learning, fault tolerance, cryptography, etc. QASMBench trades-off between generality and usability. It covers the number of qubits ranging from 2 to 60K, and the circuit depth from 4 to 12M, while keeping most of the benchmarks with qubits less than 16 so they can be directly verified on contemporary publicavailable cloud quantum machines. QASMBench is available at https://github.com/uuudown/QASMBench.
To achieve exascale computing, fundamental hardware architectures must change. The most significant consequence of this assertion is the impact on the scientific applications that run on current high performance computing (HPC) systems, many of which codify years of scientific domain knowledge and refinements for contemporary computer systems. In order to adapt to exascale architectures, developers must be able to reason about new hardware and determine what programming models and algorithms will provide the best blend of performance and energy efficiency into the future. While many details of the exascale architectures are undefined, an abstract machine model is designed to allow application developers to focus on the aspects of the machine that are important or relevant to performance and code structure. These models are intended as communication aids between application developers and hardware architects during the co-design process. We use the term proxy architecture to describe a parameterized version of an abstract machine model, with the parameters added to elucidate potential speeds and capacities of key hardware components. These more detailed architectural models are formulated to enable discussion between the developers of analytic models and simulators and computer hardware architects. They allow for application performance analysis and hardware optimization opportunities. In this report our goal is to provide the application development community with a set of models that can help software developers prepare for exascale. In addition, use of proxy architectures, through the use of proxy architectures, we can enable a more concrete exploration of how well application codes map onto the future architectures.
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