This paper proposes a cantilever-based memory structure for storing binary data at extreme operating temperature (up to 300 C) in rugged electronics. The memory bit (0/1) is formed by opening/closing of an electrostatic switch. Permanent retention is obtained by adhesive force between two smooth surfaces in contact, eliminating leakage observed in all types of storage-layer-based NVMs. The Reset utilizes a train of short pulses to break the adhesion between the electrodes. This allows the Nano-electromechanical switch (NEMS) memory to be implemented using a simple bi-layer design and easily integrated with CMOS platforms. We propose an array structure where each memory cell consists of a NEMS memory device and one NMOS transistor for full random-access operation.

This paper proposes a cantilever-based memory structure for storing binary data at extreme operating temperature (up to 300 C) in rugged electronics. The memory bit (0/1) is formed by opening/closing of an electrostatic switch. Permanent retention is obtained by adhesive force between two smooth surfaces in contact, eliminating leakage observed in all types of storage-layer-based NVMs. The Reset utilizes a train of short pulses to break the adhesion between the electrodes. This allows the Nano-electromechanical switch (NEMS) memory to be implemented using a simple bi-layer design and easily integrated with CMOS platforms. We propose an array structure where each memory cell consists of a NEMS memory device and one NMOS transistor for full random-access operation.

Applications such as Logging-While-Drilling (L WD), automotive, and aerospace systems require electronics whose operating temperature is much higher than that of conventional consumer electronics. One of the most critical functional blocks for high temperature operation is memory due to the significantly increased leakage. This paper explains two different memories (SRAM and NEMS NVM) for high temperature operation. In the SRAM, circuit techniques for improving sensing margin under the leaky bit line condition will be discussed. In the NEM NVM, two adhesion-force-based NEM NYM devices will be introduced.