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Optical Network Unit (ONU) and Optical Line Terminal (OLT) are two basic device elements in an Ethernet Passive Optical Network (EPON). To support an optical multi-point network, the Multi-Point Control Protocol (MPCP) is being standardized in the IEEE 802.3ah Task Force (Ethernet in the First Mile -EFM) by defining a Multi-Point MAC Control sublayer as an extension of the existing MAC Control sub layer [1]. In this paper, the design and implementation of MPCP as part of ONU prototyping for EFM are described. The design is undertaken on a platform integrated with an ARM processor and FPGA. The discussions focus on methods to improve operation efficiency and hardware/firmware co-design with a well-defined interface.1.

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This paper presents a 0.009 to 1.4 GHz frequency synthesizer that is able to compensate for changes in frequency tuning range due to temperature variations by switching VCO bands with minimal phase and frequency errors, without cycle slipping and without introducing any phase offsets. This is accomplished by a sub-threshold capacitor bank switching circuit that causes the gradual addition of capacitance slowly enough to allow the loop to adjust the VCO control voltage to compensate. The additional circuitry uses less than 0.001 mm 2 of silicon area and has minimal power consumption and minimal effects on the synthesizer's phase noise when fully switched. The synthesizer used to demonstrate this was implemented in a 0.18 µm SiGe BiCMOS process and achieves 365 fs integrated jitter at 1.05 GHz with a total power consumption of 81 mW. Measurements of the capacitor bank switching circuit shows it prevents cycle slipping during band switching and reduces the maximum frequency deviation by 99.3%.Index Terms-Analog integrated circuits, BiCMOS integrated circuits, frequency synthesizer, phase-locked loop (PLL), radio frequency integrated circuits, tunable circuits and devices, sub-threshold CMOS circuits, voltage-controlled oscillators (VCOs)