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A high speed, low jitter low voltage differential signaling (LVDS) output driver for high speed serial transmission is presented. Based on the comparison among four typical output driver architectures and the analysis of the output signal swing, an additional differential termination is addressed at the source of the driver to improve the signal integrity (SI). The stipulated common mode voltage is achieved over process, voltage, temperature (PVT) variations without trimming methodology, by means of a common mode feedback (CMFB) circuit and a novel high order temperature compensation bandgap reference. The simulation results show the temperature coefficient (TC) of the bandgap is only 1.77 ppm/°C. The whole driver circuit is implemented in SMIC 0.18 lm CMOS technology. It provides an output differential mode voltage of 567 mV and a common mode voltage of 1.201 V at 2 Gbps, and consumes 15.41 mA total current with a 2.5 V power supply. The output root mean square (RMS) jitter of the driver is only 7.65 ps.

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