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We report on an alternative atomic layer deposited (ALD) TaN barrier process for Cu interconnects for 14nm technology node and beyond. ALD films provide ultrathin, conformal barrier with reduced overhang and bottom thickness in contrast to physical vapor deposited (PVD) films. This enables via-contact resistance reduction and improved gap-fill while maximizing Cu volume in a trench/via structure. Blanket film studies show that ALD films are 10-15% less dense compared to Ta-rich PVD films, and more importantly only desired low-resistance a-Ta nucleates on ALD films vs. thin PVD films. To maximize density while protecting low-k dielectric during deposition and maintaining low-contact resistance, we explored different flavors and combinations of thermal (tALD) and plasma-enhanced ALD (PEALD). We achieved via contact resistance reduction of 25-35%, with equivalent or better performance for yield, defectivity and electromigration (EM), time-dependent dielectric breakdown (TDDB) and stress migration (SM) reliability.

Early in-line detection of systematic patterning problems in technology development can dramatically improve a technology's chance for success. By uncovering layout geometries that are difficult to implement, prompt action may be taken so that solutions are in place well before product chips that contain these and similar patterns enter the manufacturing line. If a solution is not in place, this could spell disaster for the product and perhaps even the technology. Ideally, product chips will work on the first lot, which is referred to as "first time right." To help ensure this, a methodology for in-line detection of systematic patterning problems using E-beam hot spot inspection (EBHI) was developed. We review this methodology, including the latest enhancements. Pattern simulation tools and other sources are used to provide die locations with challenging geometries for evaluation. EBHI evaluates the patterning capability for these locations using modulated wafers. A multifunction team addresses any hot spots that fail within the process window. EBHI is then used to evaluate the solutions proposed by this team. Application of this methodology to a fin-shaped field effect transistor technology is described using examples from the fin and back end of line modules. These examples illustrate the full range of actions used to resolve patterning issues. Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 06/02/2015 Terms of Use: http://spiedl.org/terms Ryan et al.: Application of E-beam hot spot inspection for early detection of systematic patterning problems. . . Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 06/02/2015 Terms of Use: http://spiedl.org/terms

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