T his paper is broken down into four major sections. Each section will describe one of the major concepts or conclusions of this paper. The first will discuss the electrical engineering concept of hardware timing analysis. We will talk about how we perform static system timing on hardware. This concept is applicable to any number of complex hardware designs, from a PC to a high-end mainframe. The second section will discuss the project management concept of critical path analysis. We will provide an overview of these concepts in a format and style that lends itself to easily recognizing the correlation between critical path analysis and hardware system timing. The third section will discuss the correlation between the two concepts discussed in the first two sections. We feel that it will become obvious from this discussion that these two concepts are actually one and the same. Even though these processes and algorithms have never, to the best of our knowledge, been studied or derived in common, they are actually one set of algorithms and one mathematical concept. Finally, in the fourth section, we will consider what we can learn from the observation that hardware system timing analysis and critical path analysis are one and the same.