To meet the high throughput requirement of communication systems, the design of high-throughput low-density parity-check (LDPC) decoders has attracted significant attention. This paper proposes a high-throughput GPU-based LDPC decoder, aiming at the large-scale data process scenario, which optimizes the decoder from the perspectives of the decoding parallelism and data scheduling strategy, respectively. For decoding parallelism, the intra-codeword parallelism is fully exploited by combining the characteristics of the flooding-based decoding algorithm and GPU programming model, and the inter-codeword parallelism is improved using the single-instruction multiple-data (SIMD) instructions. For the data scheduling strategy, the utilization of off-chip memory is optimized to satisfy the demands of large-scale data processing. The experimental results demonstrate that the decoder achieves 10 Gbps throughput by incorporating the early termination mechanism on general-purpose GPU (GPGPU) devices and can also achieve a high-throughput and high-power-efficiency performance on low-power embedded GPU (EGPU) devices. Compared with the state-of-the-art work, the proposed decoder had a × 1.787 normalized throughput speedup at the same error correcting performance.

Designing an efficient decoder is an effective way to improve the performance of polar codes with limited code length. List flip decoders have received attention due to their good performance trade-off between list decoders and flip decoders. In particular, the newly proposed dynamic successive cancellation list flip (D-SCLF) decoder employs a new flip metric to effectively correct high-order errors and thus enhances the performance potential of present list flip decoders. However, this flip metric introduces extra exponential and logarithmic operations, and the number of these operations rises exponentially with the increase in the order of error correction and the number of information bits, which then limits its application value. Therefore, we designed an adaptive list flip (ALF) decoder with a new heuristic simplified flip metric, which replaces these extra nonlinear operations in the original flip metric with linear operations. Simulation results show that the simplified flip metric does not reduce the performance of the D-SCLF decoder. Moreover, based on the in-depth theoretical analyses of the combination of the adaptive list and the list flip decoders, the ALF decoder adopts the adaptive list to further reduce the average complexity.

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