In this study, we propose a deep neural network (DNN) model that extracts the subgap states in the channel layer of oxide thin-film transistors. We have developed a framework that includes creating a model training set, preprocessing the data, optimizing the model structure, decoding from density-of-state (DOS) parameters to current-voltage (I-V) characteristics, and evaluating the model performance and accuracy of curve fitting. We investigate in detail the effect of data preprocessing methods and model structure on the performance of the model. The primary finding is that the input data type and the last hidden layer significantly affects the performance of the regression model. Using double-type input data composed of several voltages and linear current values is more advantageous than using log-scale current. Moreover, the number of nodes in the last hidden layer of a regression model with multiple output nodes should be large enough to avoid interference between the output values. The proposed model outputs five DOS parameters, and the resulting parameters are decoded to an I-V curve through interpolation based on the nearest 32 data from the given dataset. We evaluate the model performance using the threshold voltage and on-current difference between a target curve and the decoded curve. The proposed model calibrates 97.1% of the 14,400 curves within the threshold voltage difference of 0.2V and on-current error of 5%. Hence, the proposed model is verified to effectively extract DOS parameters with high accuracy based on the current characteristics of oxide thin-film transistors. We expect to improve the efficiency of defect analysis by replacing the iterative manual technology computer aided design (TCAD) curve fitting with an automatic DNN model.
Resistive random-access memory (RRAM) is essential for developing neuromorphic devices, and it is still a competitive candidate for future memory devices. In this paper, a unified model is proposed to describe the entire electrical characteristics of RRAM devices, which exhibit two different resistive switching phenomena. To enhance the performance of the model by reflecting the physical properties such as the length index of the undoped area during the switching operation, the Voltage ThrEshold Adaptive Memristor (VTEAM) model and the tungsten-based model are combined to represent two different resistive switching phenomena. The accuracy of the I–V relationship curve tails of the device is improved significantly by adjusting the ranges of unified internal state variables. Furthermore, the unified model describes a variety of electrical characteristics and yields continuous results by using the device’s current-voltage relationship without dividing its fitting conditions. The unified model describes the optimized electrical characteristics that reflect the electrical behavior of the device.
In this study, a compact CMOS integrate-and-fire (I&F) neuron circuit embedding an operational transconductance amplifier (OTA) has been designed for enhancing the fidelity in output generation. The OTA block in the neuron circuit allows for maintaining stability in I&F functions even under high-frequency operation conditions. The designed neuron circuit consists of OTA circuit, membrane capacitor, inverter, and reset MOSFET, from which the area occupancy is approximated to be 22 × 43 µm 2 . Featuring the simple and compact structure, the proposed neuron circuit shows the capability to control the firing frequency by adjusting the amplitude and temporal width of the synaptic pulse, resulting in high fidelity in I&F function. Series of circuit simulations have been performed to validate the systematic operations of the neuron circuit by HSPICE presuming the 0.35-µm Si CMOS technology. Moreover, temperature dependence was also investigated so that the robustness and stability of the neuron circuit at elevated operation temperatures were verified. The results provide a practical way of designing a compact and reliable neuron circuit working with the synaptic devices having deviations in operation characteristics in the hardware-oriented spiking neural network (SNN).INDEX TERMS Integrate-and-fire neuron circuit, operational transconductance amplifier (OTA), fidelity, circuit simulation, stability, hardware-oriented spiking neural network (SNN).
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