In this paper, a reduced‐component switched‐capacitor boost multilevel inverter (SC‐BMLI) topology is proposed for off‐grid and on‐grid applications. Recently, switched‐capacitor‐based multilevel inverter (MLI) topologies have been employed to avoid the need for multiple isolated direct current (DC) sources when compared with traditional cascaded MLIs. To generate a nine‐level stepped‐up voltage across the load, the SC‐BMLI needs only eight power switches and two capacitors. To get the appropriate nine‐level switching pattern, phase disposition pulse width modulation (PD‐PWM) has been used. An extended 13‐level boost multilevel inverter (BMLI) is also discussed in this paper. The proposed topology is connected to the grid to control the grid current using synchronous reference frame‐based proportional–integral controller. A small‐signal modeling and analysis has been discussed in detail for the phase‐locked‐loop (PLL). Moreover, to prove the superior performance of the SC‐BMLI, comparative analysis with an existing single DC source MLI has also been performed. The feasibility of the 9‐level and 13‐level proposed topologies, with and without the grid‐connection, is evaluated by Matlab/Simulink simulation and verified by an experimental study using the OPAL‐RT 4510 real‐time platform. Further, prototype model of nine‐level BMLI has been developed in the laboratory using DSpace 1103 controller and results are compared with simulation.
Summary
In this paper, a new topology of the cascaded asymmetrical multilevel inverter (CAMI) has been presented. In the output voltage of the CAMI, a high number of levels are required to reduce the total harmonic distortion (THD). To increase the number of levels, more auxiliary H‐bridges are required to connect with the MAIN H‐bridge of the CAMI, which increases the number of components, cost, and space for installation. To solve this problem, a low‐rating buck converter is connected with one of the auxiliary bridge. With this modification, any number of levels can be achieved in the output voltage with lesser number of circuit components. To show the ability of the proposed variable voltage CAMI, it is compared with existing cascaded multilevel inverter topologies in terms of number of semiconductor devices, the number of DC sources, variety of DC sources, total standing voltage, the number of semiconductor devices in the current path, efficiency, and THD. In this paper, simulation of the proposed topology with nearest level control modulation has been performed using MATLAB/SIMULINK environment. The output voltage, load current, power factor, power, and THD have been obtained by simulation of 21‐level variable voltage CAMI and are validated by experiment results under a resistive and motor load. Hardware implementation has been done by compiling nearest level control modulation into dSPACE DS1104 R&D controller board.
Multilevel inverters (MLIs) have formed a new wave of interest in research and industry. Switched capacitor-based multilevel inverters are used to avoid the need for multiple separated DC sources compared to cascaded MLIs. However, the inclusion of several capacitors creates problems such as high inrush current, voltage imbalance. To avoid these drawbacks, this paper proposes an isolation-based scheme by using a flyback converter in the switched capacitor multilevel inverter. Further, the overall topology provides step-up AC voltage across the load from a single DC source with fewer power switches. To generate a step-up five-level voltage across the load, switched capacitor-based multilevel inverter needs six power switches and only one capacitor. To get the appropriate switching operation to generate the NL-levels, phase disposition pulse width modulation (PD-PWM) has been developed. The extended nine-level S
2
-MLI is also discussed in this paper under different conditions as change in input source voltage and dynamic load change. Moreover, to prove the superior performance of switched-capacitor single DC source multilevel inverter (S2-MLI), comparative analysis with existing single DC source MLI has been performed. The effectiveness and feasibility of the proposed topology are tested with varieties of loads by simulation using Matlab/Simulink. To validate the simulation results, hardware implementation has been done of five-level S2-MLI considering resistive and motor load by using DSpace 1103 controller.
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