Magnetic skyrmions are promising candidates as elementary nanoscale bits in logic-in-memory devices, intrinsically merging high-density memory and computing capabilities. Here we exploit the dynamics of skyrmions interacting with anisotropy energy barriers patterned by ion irradiation to design programmable logic gates. Using micromagnetic simulations with experimental parameters, we show that a fine tuning of the barrier height and width allows the selective tunneling of skyrmions between parallel nanotracks triggered by skyrmion-skyrmion interaction. This can be leveraged to design a skyrmion demultiplexer logic gate that works solely using skyrmions as logic inputs. By cascading and connecting demultiplexer gates with a specific topology, we develop a fully programmable logic gate capable of producing any possible logic output as a sum of all minterms generated by a given set of inputs without requiring any complex additional electric or magnetic interconversion. The proposed design is fully conservative and cascadable, enabling purely skyrmion-based logic-in-memory devices.

Magnetic skyrmions are promising candidates for logic-in-memory applications, intrinsically merging high-density nonvolatile data storage with computing capabilities, owing to their nanoscale size, fast motion, and mutual repulsions. However, concepts proposed so far suffer from reliability issues as well as inefficient conversion of magnetic information to electrical signals. In this paper, we propose a logicin-memory device, which exploits skyrmion confinement and channeling using anisotropy energy barriers to achieve reliable data storage and synchronous shift in racetracks combined with cascadable and reprogrammable logics relying purely on magnetic interactions. The device combines a racetrack shift register based on skyrmions confined in nanodots with full-adder (FA) gates. The designed FA is reprogrammable and cascadable and can also be used to perform simple logic operations such as AND, OR, NOT, NAND, XOR, and NXOR. The monolithic design of the logic gate and the absence of any complex electrical contacts makes the device ideal for integration with conventional CMOS circuitry.