Reverse-time chaos can be used to realise hardware chaotic systems that can operate at speeds equivalent to existing state-of-the-art while requiring significantly less complex circuitry. Unlike traditional chaotic systems, which require significant analogue hardware that is difficult to realise at high speed, the reverse-time system can be realised with a field programmable gate array calculating a digital iterated map. The resulting output forgoes the need for digital-to-analogue conversion by directly driving a series RLC filter. Since the dynamics of this system are determined by an iterated map, precise control of this system is possible by adjusting the map's initial condition. Hardware results for the controllable reverse-time system demonstrate chaotic behaviour at an operating frequency of 1.8 MHz and show promise for extension to higher frequencies.Introduction: Chaotic electronic systems have been previously investigated for their potential utility in many applications including communication [1] and radar [2]. Previous work has shown that such systems can be constructed and tuned, such that they possess dynamics advantageous for their specific application [3]. Control schemes have also been devised that can maintain these systems on desired trajectories while in operation [4]. By combining these characteristics with matched filter decoding [5], many of the necessary components for a modern high-performance communication system or radar may be realised with chaotic dynamics.Actually realising physical systems that exhibit the chaotic dynamics necessary for these applications has long proven to be a difficult task. Although surprisingly simple systems constructed from both familiar [6] and exotic [7] components have been shown to behave chaotically, such systems do not readily lend themselves to control. Simulations have shown that hardware can be developed for a potentially controllable chaotic system with an exact solution [8], but this hardware relies on many analogue components that are not expected to scale well with high-speed operation.Reverse-time chaos provides a potential solution for realising chaos in hardware with both solvable and controllable properties without sacrificing the ability to scale in frequency. First proposed by Corron et al. in [9], reverse-time chaos describes behaviour that differs from traditional chaos by using the current state of the system to represent all of its past states instead of all of its future states. Despite this difference, reversetime chaos retains a positive Lyapunov exponent and a corresponding sensitivity to initial conditions that defines traditional chaotic systems.

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The use of reverse time chaos allows the realization of hardware chaotic systems that can operate at speeds equivalent to existing state of the art while requiring significantly less complex circuitry. Matched filter decoding is possible for the reverse time system since it exhibits a closed form solution formed partially by a linear basis pulse. Coefficients have been calculated and are used to realize the matched filter digitally as a finite impulse response filter. Numerical simulations confirm that this correctly implements a matched filter that can be used for detection of the chaotic signal. In addition, the direct form of the filter has been implemented in hardware description language and demonstrates performance in agreement with numerical results.

This paper describes design choices and tradeoffs made when designing total-dose hardness into an advanced CMOS integrated circuit. Closed geometry transistors are described and compared, emphasizing their radiation tolerant performance. Speed and area tradeoffs incurred in circuit design when using such closed geometry transistors are illustrated in the design of an advanced IEEE 1394 cable physical layer mixed-signal interface chip.