The design of a complete, stored-program digital optical computer is described. A fully functional, proof-of-principle prototype can be achieved by using LiNbO(3) directional couplers as logic elements and fiber-optic delay lines as memory elements. The key design issues are computation in a realm where propagation delays are much greater than logic delays and implementation of circuits without fip-flops. The techniques developed to address these issues yield architectures that do not change as their clocking speed is scaled upward and the size is scaled downward proportionally; these are called speed-scalable architectures. Signal amplitude restoration and resynchronization are accomplished by the novel technique of switching in a fresh copy of the system clock. Device characteristics that are important to the proof-of-principle demonstration are discussed, including the special properties and limitations that are important when designing with them. Design principles are exemplified by the design of an n-bit counter. Following this, the design for a stored-program bit-serial computer is described. We estimate that the described prototype architecture can be operated in the 100-MHz region with off-the-shelf components, and in the O. 1-1-THz region with foreseeable future components.

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Time-of-flight optical computer designs must implicitly or explicitly allow for the synchronization of all signals at all interaction points. This paper details algorithms for calculating delays required for synchronization of optical systems, as well as the sensitivity of these systems to variations in delays from their nominal values. These algorithms, which are applied to graph models of systems, form the basis for an optical systems design methodology in which the designer develops architectures with lumped delays and idealized zero-delay devices. When applied to the system designs, the algorithms provide estimates of actual delay distributions and sensitivities.

List-mode processing of gated cardiac blood pool data has be shown to been more accurate than standard frame-mode processing, but it has not gained widespread clinical use because of the difficulties associated with post-processing of the acquired data. We therefore investigated the possibility of performing the list-mode processing concurrently with the acquisition of the data, i.e. real-time list-mode processing. A programme for simultaneous acquisition and processing of gated cardiac images was written in assembly code and implemented on a personal computer. The programme was tested in phantom studies, then used in 200 consecutive patient examinations. Data could be concurrently acquired from the gamma-camera and processed with forward-backward framing at a great enough speed so that no loss of information occurred at up to 40,000 counts per second, a value exceeding typical count rates observed in clinical practice. The ease-of-use and the clinical benefits of real-time list-mode processing suggest that it may become a standard method for gated examinations of the left ventricle in the near future.