Dataflow analysis techniques are suitable for the temporal analysis of real-time stream processing applications. However, the applicability of these models is currently limited to systems with starvation-free schedulers, such as Time-Division Multiplexing (TDM) schedulers. Removal of this limitation would broaden the application domain of dataflow analysis techniques significantly. In this paper we present a temporal analysis technique for Homogeneous Synchronous Dataflow (HSDF) graphs, that is also applicable for systems with non-starvation-free schedulers. Unlike existing dataflow analysis techniques, the proposed analysis technique makes use of an enabling-jitter characterization and iterative fixed-point computation. The presented approach is applicable for arbitrary (cyclic) graph topologies. Buffer capacity constraints are taken into account during the analysis and sufficient buffer capacities can be determined afterwards. The approach presented in this paper is the first approach that considers non-starvation-free schedulers in combination with arbitrary HSDF graphs The proposed dataflow analysis technique is implemented in a tool. This tool is used to evaluate the analysis technique using examples that illustrate some important differences with other temporal analysis methods. The case-study discusses how the method presented in this paper can be used to solve a problem with the inaccuracy of the temporal analysis results of a real-time stream processing system. This stream processing system consists of an FM receiver together with a DAB receiver application which both share a Digital Signal Processor (DSP).
Stream processing applications executed on embedded multiprocessor systems regularly contain cyclic data dependencies due to the presence of feedback loops and bounded FIFO buffers. Dataflow modeling is suitable for the temporal analysis of such applications. However, the accuracy can be unsatisfactory as existing temporal analysis techniques ignore that cyclic data dependencies limit interference between tasks executed on shared processors.This paper presents a dataflow analysis approach that increases the analysis accuracy by taking into account that cyclic data dependencies limit interference between tasks. It is shown that the approach is applicable for single-rate stream processing applications that are executed on multiprocessor systems using static priority preemptive schedulers.The improvement of accuracy is demonstrated in a case study employing a WLAN 802.11p transceiver application that is executed on a multiprocessor system with shared processors.
Real-time stream processing applications often contain multi-rate behavior. This multi-rate behavior can be accurately modeled using Synchronous Dataflow (SDF) graphs. However, no temporal analysis technique exists which is applicable for arbitrary cyclic SDF graphs and can handle cyclic resource dependencies.This paper presents a temporal analysis flow for SDF graphs which is applicable for systems with non-starvationfree schedulers such as static priority pre-emptive schedulers. The analysis flow uses an enabling rate characterization to calculate response times. This enabling rate characterization is determined using multi-dimensional periodic schedules and allows a more accurate modeling of enabling patterns than is possible with a characterization that is based on periods and enabling jitters.The presented approach is applicable for arbitrary (cyclic) graph topologies and can take buffer capacity constraints into account during analysis. Also cyclic resource dependencies can be analyzed. The presented analysis flow is the first approach that considers arbitrary SDF graph topologies in combination with cyclic resource dependencies that are caused by non-starvation-free schedulers.The proposed analysis flow is evaluated using a radio processing application. The analysis results are obtained using a tool in which the analysis flow is implemented. This case-study illustrates that the used enabling characterization achieves up to 87% better response times than with an enabling jitter based characterization.
Existing temporal analysis and buffer sizing techniques for real-time stream processing applications ignore that FIFO buffers bound interference between tasks on the same processor. By considering this effect it can be shown that a reduction of buffer capacities can result in a higher throughput. However, the relation between buffer capacities and throughput is non-monotone in general, which makes an exploitation of the effect challenging.In this paper a buffer sizing approach is presented which exploits that FIFO buffers bound interference between tasks on shared processors. The approach combines temporal analysis using a cyclic dataflow model with computation of buffer capacities in an iterative manner and thereby enables higher throughput guarantees at smaller buffer capacities. It is shown that convergence of the proposed analysis flow is guaranteed.The benefits of the presented approach are demonstrated using a WLAN 802.11p transceiver application executed on a multiprocessor system with shared processors. If buffers without blocking writes are used an up to 25% higher guaranteeable throughput and up to 23% smaller buffer capacities can be determined compared to existing approaches. For systems using buffers with blocking writes the guaranteeable throughput is even up to 43% higher and buffer capacities up to 11% smaller.
Many real-time stream processing applications are initially described as a sequential application containing while-loops, which execute for an unknown number of iterations. These modal applications have to be executed in parallel on an MPSoC system in order to meet their real-time throughput constraints. However, no suitable approach exists that can automatically derive a temporal analysis model from a sequential specification containing whileloops with an unknown number of iterations.This paper introduces an approach to the automatic generation of a Structured Variable-rate Phased Dataflow (SVPDF) model from a sequential specification of a modal application. The realtime requirements of an application can be analyzed despite the presence of while-loops with an unknown number of iterations. It is shown that an algorithm that has a polynomial time computational complexity can be applied on the generated SVPDF model to determine whether a throughput constraint can be met. The enabler for the automatic generation of an SVPDF model is the decoupling of synchronization between tasks that contain different while-loops. A DVB-T radio transceiver illustrates the derivation of the SVPDF model.
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