This article presents radar signal processing for sensing in the context of assisted living. This is covered through 3 example applications: human activity recognition for activities of daily living, respiratory disorder and Sleep Stages classification. The common challenge of classification is discussed within a framework of measurements/pre-processing, feature extraction, and classification algorithms for supervised learning. Then, the specific challenges of the 3 applications from a signal processing standpoint are detailed in their specific data processing and ad-hoc classification strategies, focusing on recent trends in the field of activity recognition (multidomain, multi-modal and fusion) and healthcare applications based on vital signs (super-resolution techniques) and commenting on outstanding challenges. To conclude, this paper explores the challenge of the real-time implementation of signal processing/classification algorithms.

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This work deals with the analysis of energy efficiency (EE) issues of hybrid automatic repeat request (HARQ) protocols such as Chase combining (CC) and incremental redundancy (IR), in a LTE baseband-based half-division duplex relay-assisted network. The EE performance is highly dependent on delay and circuitry power consumption, i.e., baseband and radio-frequency (RF) parts, and the effects of these components are investigated for amplify and forward (AF) and decode and forward (DF) protocols. Moreover, a realistic estimation of the baseband power consumption is provided. Our contributions in this paper can be summarized as follows: (1) an accurate estimation of power consumption of the main blocks of the LTE baseband is provided based on a real field-programmable gate array (FPGA) target and is integrated to a global energy consumption model (2) based on the previous power consumption evaluation; energy-efficiencies of DF protocol with HARQ-CC and HARQ-IR are investigated with various modulation orders; in addition, a quite insightful study of the energy efficiency-spectral efficiency trade-off is conducted, and (3) DF and AF protocols with HARQ are compared in terms of EE, and recommendations are suggested in order to jointly enhance the QoS and the energy efficiency of wireless systems.

Power consumption constitutes a major challenge for electronics circuits. One possible way to deal with this issue is to consider it very soon in the design process in order to explore various design choices. A typical design flow often starts with a high-level description of a full system, which imposes to provide accurate models. Power modelling techniques can be employed, providing a way to find a relationship between power and other metrics. Furthermore, it is also important to consider efficient power characterization techniques. The role of this paper is, first, to provide an overview of RTL to transistor level power modelling and estimation techniques for FPGAs and ASICs devices. Second, it aims at proposing a classification of all approaches according to defined metrics, which should help designers in finding a particular method for their specific situation, even if no common reference is defined among the considered works. Index Terms-Power consumption, power modelling, power estimation, high-level power estimation, FPGA, ASIC, tools.. Antifuse Technology (e.g., Actel TM , Quicklogic TM): an antifuse remains in a high-impedance state until it is programmed into a low-impedance or "fused" state (Figure 9.18). This technology can be used only once on one-time programmable (OTP) devices; it is less expensive than the RAM technology.