The extraction of nitride trap density (Nt) filled with electrons emitted by thermal emission (TE) in the charge-trapping layer of 3-D NAND flash memory is demonstrated. The intercell program (IP) pattern was adopted to intentionally inject electrons into the intercell region to minimize the influence of lateral migration (LM) on the trap profiles. This was confirmed by the retention characteristics observed at 120 °C, where the charge loss is mainly caused by the TE of the trapped electrons in the nitride layer. The extracted peak value of Nt at EC-ET value of 1.20 eV using the IP pattern was as low as 1.01×10 19 cm -3 eV -1 , in the scan range of 0.96 eV to 1.27 eV. This value was 17% lower than that from the conventional adjacent cell program (P-P-P) pattern. Therefore, the IP pattern can be used in extracting trap profiles in the SiN layer in scaled 3-D NAND memories. INDEX TERMS 3D NAND flash memory, data retention, lateral migration, trap profilingThis work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.

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The quantitative characteristics of traps created in the bandgap-engineered tunneling oxide (BE-TOX) layer and block layer after program/erase (P/E) stress-cycling in a 3D NAND flash memory were investigated. The trap spectroscopy by charge injection and sensing technique was used to obtain the distribution of traps in these layers. In the BE-TOX layer, significant traps were generated at 1.3 eV in the nitrogen-doped layer (N1) and increased by 48% in the fresh cell after P/E stress-cycling. The H bonds in the N1 are more likely to break during the stress-cycling and create neutral ≡ SiO • traps. In the block layer, however, trap generation was negligible after stress-cycling.INDEX TERMS 3D NAND flash memory, bandgap-engineered tunneling, program/erase cycling, trap profile, TSCIS

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