This paper presents an area-and power-efficient ASIC for 3D forward-looking intravascular ultrasound imaging. The ASIC is intended to be mounted at the tip of a catheter, and has a circular active area with a diameter of 1.5 mm on top of which a 2D array of piezo-electric transducer elements is integrated. It requires only 4 micro-coaxial cables to interface 64 receive (RX) and 16 transmit (TX) elements with an imaging system. To do so, it routes high-voltage (HV) pulses generated by the system to selected TX elements using compact HV switch circuits, digitizes the resulting echo signal received by a selected RX element locally, and employs an energy-efficient loadmodulation datalink to return the digitized echo signal to the system in a robust manner. A multi-functional command line provides the required sampling clock, configuration data and supply voltage for the HV switches. The ASIC has been realized in a 0.18 μm HV CMOS technology and consumes only 9.1 mW. Electrical measurements show 28 V HV switching and RX digitization with a 16 MHz bandwidth and 53 dB dynamic range. Acoustical measurements demonstrate successful pulse transmission and reception. Finally, a 3D ultrasound image of a 3-needle phantom is generated to demonstrate the imaging capability.

Intravascular ultrasound (IVUS) is an imaging modality used to visualize atherosclerosis from within the inner lumen of human arteries. Complex lesions like chronic total occlusions require forward-looking IVUS (FL-IVUS), instead of the conventional side-looking geometry. Volumetric imaging can be achieved with 2-D array transducers, which present major challenges in reducing cable count and device integration. In this work, we present an 80-element lead zirconium titanate matrix ultrasound transducer for FL-IVUS imaging with a front-end application-specific integrated circuit (ASIC) requiring only four cables. After investigating optimal transducer designs, we fabricated the matrix transducer consisting of 16 transmit (TX) and 64 receive (RX) elements arranged on top of an ASIC having an outer diameter of 1.5 mm and a central hole of 0.5 mm for a guidewire. We modeled the transducer using finite-element analysis and compared the simulation results to the values obtained through acoustic measurements. The TX elements showed uniform behavior with a center frequency of 14 MHz, a -3-dB bandwidth of 44%, and a transmit sensitivity of 0.4 kPa/V at 6 mm. The RX elements showed center frequency and bandwidth similar to the TX elements, with an estimated receive sensitivity of /Pa. We successfully acquired a 3-D FL image of three spherical reflectors in water using delay-and-sum beamforming and the coherence factor method. Full synthetic-aperture acquisition can be achieved with frame rates on the order of 100 Hz. The acoustic characterization and the initial imaging results show the potential of the proposed transducer to achieve 3-D FL-IVUS imaging.

Bone marrow stromal cell (BMSC)-mediated endochondral bone formation may be a promising alternative to the current gold standards of autologous bone transplantation, in the development of novel methods for bone repair. Implantation of chondrogenically differentiated BMSCs leads to bone formation in vivo via endochondral ossification. The success of this bone formation in an allogeneic system depends upon the interaction between the implanted constructs and the host immune system. The current study investigated the effect of chondrogenically differentiated human bone marrow stromal cell ---------------------------------------------------------This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

This thesis discusses the basic architecture, circuit implementation and measurements of a 4-cable front-end ASIC with high-voltage (HV) transmitting and receive digitization for Intravascular ultrasound imaging. It is the first ASIC that digitizes the received signals locally, allowing them to be transmitted in a robust digital form to an external imaging system. The ASIC mainly contains three parts: the receive signal chain, the clock and data recovery circuits and the HV transmit switch circuits. The receive signal chain employs an energy-efficient inverter-based OTA in the analog front end (AFE) and a 60MS/s chargesharing SAR ADC. The clock and data recovery circuits decode clock and data from the command line. The HV transmit switches are used to transfer the HV pulse generated in the imaging system to the selected transducer elements. Several techniques are proposed to reduce the required number of cables. A multifunctional mixed-voltage command line is employed to combine the clock, the command data and the supply for the HV switch control circuits through pulse width modulation and amplitude modulation. The ADC output codes are transmitted through only 1 cable by means of load modulation. A prototype has been implemented in a TSMC 0.18µm HV CMOS process. The measurement results show that the prototype is able to transmit HV pulses and receive echo signal with only 4 cables. Besides, a B-mode image has been generated to show the imaging ability of the ASIC.