SUMMARYIn this work, the benefits of memristor-based multilevel memories are described along with their design problems. Starting with measurements of discrete actual devices, a discrete memristor-based multilevel memory is developed. It uses a printed circuit board in order to connect eight packaged memristors from Bio Inspired to test a ternary arithmetic logic unit on a field programmable gate array. These circuits are then integrated in the second proposed memory system based on a 150-nm CMOS process that can be equipped with memristors on top of the metal layers. This integrated solution includes proper read-out, erase, and write circuits to control real memristors and 32×32 memristive memory cells. It is compared with a common static randomaccess memory in terms of area, computation speed, and power consumption showing benefits for memory sizes bigger than 70 words. Because yield and device variations are still a big issue in memristor fabrication, methods to counter these problems are also proposed in the end. An actual implementation should offer several trimming solutions to ensure proper functionality of a prototype memory as well as a power-on calibration, until these problems are solved. The development of the presented memories is not only based on different models but also based on measurements done with real devices.

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This paper contains the development and verification of low noise amplifier stages (LNA) within the framework of a front-end for digital satellite radio diversity receiver operating around 2.3 GHz. First, a low noise high gain LNA is developed to reach the high requirements of satellite radio reception. Therefore a single-ended cascode architecture is chosen. The simulated noise figure is 0.58 dB and the gain is 19.87 dB. Second, a differential stage is designed to fulfill the specification with regards to backward isolation and common-mode rejection. This circuit has a measured gain of 10.15 dB and a backward isolation of -43.24 dB. Furthermore, the two stages are combined by an integrated balun and the overall performance is verified. Due to the good noise performance of the first stage, the overall noise figure is 0.64 dB, the gain is 29.83 dB and the backward isolation is -76.07 dB. All in all the whole circuit has a current consumption of 25.40 mA. Finally the LNA performance is compared with other state-of-the-art LNAs.

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