This paper presents a novel energy-efficient and Dynamically Reconfigurable Computing Circuit (DRC²) concept based on memory architecture for data-intensive (imaging, …) and secure (cryptography, …) applications. The proposed computing circuit is based on a 10-Transistor (10T) 3-Port SRAM bitcell array driven by a peripheral circuitry enabling all basic operations that can be traditionally performed by an ALU. As a result, logic and arithmetic operations can be entirely executed within the memory unit leading to a significant reduction in power consumption related to the data transfer between memories and computing units. Moreover, the proposed computing circuit can perform extremely-parallel operations enabling the processing of large volume of data. A test case based on image processing application and using the saturating increment function is analytically modeled to compare conventional and DRC²-based approaches. It is demonstrated that DRC²-based approach provides a reduction of clock cycle number of up to 2x. Finally, potential applications and must-be-considered changes at different design levels are discussed.

For the last 25 years, occupancy grids have been intensively used as a well-understood framework for many robotic applications, such as path planning or obstacle avoidance. They offer a unifying framework for multiple heterogeneous sensor integration using a probabilistic representation of sensor data. This integration is computed through Bayesian techniques or evidence combination approaches, both requiring high computation workload using real number representation. In critical application domains, it is challenging to fuse data coming out of several sensors in real-time using constrained embedded platforms. In this paper, we propose a revised theoretical formulation of multi-sensor fusion using only integer arithmetic. We apply this novel framework to compute occupancy grid by only using integer numbers to represent probabilities. Compared to the state-of-the-art solutions, our fusion framework enables implementation on platforms with no floating-point support. Our experiments demonstrate that fusion of real automotive data from a 4-scans LIDAR can be integrated into a microcontroller without a floating-point unit. Our approach opens the perspective for microcontroller or even for hardware block based on ASIC or FPGA to support occupancy grid applications with real-time performance.

Safe Autonomous Vehicles (AVs) will emerge when comprehensive perception systems will be successfully integrated into vehicles. Advanced perception algorithms, estimating the position and speed of every obstacle in the environment by using data fusion from multiple sensors, were developed for AV prototypes. Computational requirements of such application prevent their integration into AVs on current low-power embedded hardware. However, recent emerging many-core architectures offer opportunities to fulfill the automotive market constraints and efficiently support advanced perception applications. This paper, explores the integration of the occupancy grid multi-sensor fusion algorithm into low power many-core architectures. The parallel properties of this function are used to achieve real-time performance at low-power consumption. The proposed implementation achieves an execution time of 6.26ms, 6× faster than typical sensor output rates and 9× faster than previous embedded prototypes.