In this paper, we discuss the use of broadband high frequency electromagnetic waves (RF) to non-destructively identify, classify and characterize performance-limiting defects in emerging nanoelectronic devices. As an illustration, the impact of thermal cycling on the RF signal characteristics (insertion loss (S 21 ) and return loss (S 11 )) is used to infer thermo-mechanical stress-induced defects in metal interconnects. The inferred defects are supported with physical analytical data where possible. In this paper, we discuss the use of broadband radio frequency (RF) to non-destructively identify and characterize performance-limiting defects in emerging nanoelectronic devices. To do this, we reinterpret previously published (mostly from reference 1), and some new data, to demonstrate the utility of RF phase data in failure mode analysis, to detect structural changes in devices, without resorting to the traditional destructive physical analysis.Emerging nanoelectronics are rapidly adapting three dimensional integrated circuits (3D-ICs), enabled by through-silicon vias (TSV), as a strategy to increase performance and functional diversification. However, the introduction of such 3D-ICs to the market has been hindered by reliability challenges such as stress related failures. Specifically, the stress buildup due to mismatch in the coefficient of thermal expansion (CTE) of the materials of construction results in the generation of defects such as cracks, voids, delamination, plastic deformation, substrate warping and buckling.1 These types of damage ultimately lead to open or short circuits in the devices, resulting in catastrophic failure. While metrology for accurate quantification of the impact of stress evolution in interconnect structures is needed, further insights are required to characterize and understand the physical damage stemming from the stress buildup. Microwave (RF)-based metrology tools offer several advantages over the traditional techniques and are uniquely suitable for studying the buried structures and interfaces inherent in such nanoelectronic devices. For example, changes in RF insertion losses offer early prognostics of the onset of failure in ball grid arrays (BGA) subjected to accelerated temperature cycling tests.2,3 RF measurements have also been used to specifically show that leakage conductance increased with the degree of voiding damage in Al and AlCu metal interconnects lines in integrated circuits.3 As well, such high frequency measurements have been used to monitor TSV interconnect performance.

The commercial introduction of three dimensional integrated circuits (3D-ICs) has been hindered by reliability challenges, such as stress related failures, resistivity changes, and unexplained early failures. In this paper, we discuss a new RF-based metrology, based on dielectric spectroscopy, for detecting and characterizing electrically active defects in fully integrated 3D devices. These defects are traceable to the chemistry of the insolation dielectrics used in the through silicon via (TSV) construction. We show that these defects may be responsible for some of the unexplained early reliability failures observed in TSV enabled 3D devices.

Scanning probe microscopes (SPMs) have some capability to image sub-surface structure, including the details of buried interfaces. This paper describes the theoretical and practical basis for obtaining information about shallow buried interfaces, subsurface compositional variations, and electrical potential variations with SPMs. Three techniques are discussed: scanning microwave microscopy (SMM) to image the capacitance of buried metal lines, scanning Kelvin force microscopy (SKFM) to image the potential of buried metal lines, and electric force microscopy (EFM) phase imaging to see buried interface surface roughness. COMSOL simulations of the SMM resonator response to small variations in tip-sample capacitance, explaining the contrast reversal phenomena, are described. SKFM and EFM images of NIST designed potential variation test structures show the potential of each technique for buried interface characterization.