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High performance single-phase Si microchannel coolers have been designed and characterized in single chip modules in a laboratory environment using either water at 22°C or a fluorinated fluid at temperatures between 20 and −40°C as the coolant. Compared to our previous work, key performance improvements were achieved through reduced channel pitch (from 75 to 60 microns), thinned channel bases (from 425 to 200 microns of Si), improved thermal interface materials, and a thinned thermal test chip (from 725 to 400 microns of Si). With multiple heat exchanger zones and 60 micron pitch microchannels with a water flow rate of 1.25lpm, an average unit thermal resistance of 15.9Cmm2∕W between the chip surface and the inlet cooling water was demonstrated for a Si microchannel cooler attached to a chip with Ag epoxy. Replacing the Ag epoxy layer with an In solder layer reduced the unit thermal resistance to 12.0Cmm2∕W. Using a fluorinated fluid with an inlet temperature of −30°C and 60 micron pitch microchannels with an Ag epoxy thermal interface layer, the average unit thermal resistance was 25.6Cmm2∕W. This fell to 22.6Cmm2∕W with an In thermal interface layer. Cooling >500W∕cm2 was demonstrated with water. Using a fluorinated fluid with an inlet temperature of −30°C, a chip with a power density of 270W∕cm2 was cooled to an average chip surface temperature of 35°C. Results using both water and a fluorinated fluid are presented for a range of Si microchannel designs with a channel pitch from 60 to 100 microns.

In 2001, IBM delivered to the marketplace a high-performance UNIX ® -class eServer based on a four-chip multichip module (MCM) code named Regatta. This MCM supports four POWER4 chips, each with 170 million transistors, which utilize the IBM advanced copper back-end interconnect technology. Each chip is attached to the MCM through 7018 flip-chip solder connections. The MCM, fabricated using the IBM high-performance glass-ceramic technology, features 1.7 million internal copper vias and high-density topsurface contact pad arrays with 100-m pads on 200-m centers. Interconnections between chips on the MCM and interconnections to the board for power distribution and MCM-to-MCM communication are provided by 190 meters of co-sintered copper wiring. Additionally, the 5100 off-module connections on the bottom side of the MCM are fabricated at a 1-mm pitch and connected to the board through the use of a novel land grid array technology, thus enabling a compact 85-mm ؋ 85-mm module footprint that enables 8-to 32-way systems with processors operating at 1.1 GHz or 1.3 GHz. The MCM also incorporates advanced thermal solutions that enable 156 W of cooling per chip. This paper presents a detailed overview of the fabrication, assembly, testing, and reliability qualification of this advanced MCM technology.