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Drawing on neuroscience, we have developed a parallel, event-driven kernel for neurosynaptic computation, that is efficient with respect to computation, memory, and communication. Building on the previously demonstrated highlyoptimized software expression of the kernel, here, we demonstrate TrueNorth, a co-designed silicon expression of the kernel. TrueNorth achieves five orders of magnitude reduction in energyto-solution and two orders of magnitude speedup in time-tosolution, when running computer vision applications and complex recurrent neural network simulations. Breaking path with the von Neumann architecture, TrueNorth is a 4,096 core, 1 million neuron, and 256 million synapse brain-inspired neurosynaptic processor, that consumes 65mW of power running at real-time and delivers performance of 46 Giga-Synaptic OPS/Watt. We demonstrate seamless tiling of TrueNorth chips into arrays, forming a foundation for cortex-like scalability. TrueNorth's unprecedented time-to-solution, energy-to-solution, size, scalability, and performance combined with the underlying flexibility of the kernel enable a broad range of cognitive applications.

We describe the successful construction of a 12.1" 800x600 microencapsulated electrophoretic active matrix display incorporating an a-Si thin film transistor backplane. The display exhibits a print-on-paper-like appearance (high reflectance, high contrast ratio and wide viewing angle) and grayscale at 83 DPI, and demonstrates the material's compatibility with commercial a-Si TFT LCD backplanes.

Abstract— We propose a novel data‐line multiplexing technique for low‐cost/high‐resolution active‐matrix liquid‐crystal displays (AMLCDs). This scheme reduces the number of data lines and driver chips required by one‐half without enormous multiplexing circuits. Another advantage of applying this technique is the reduction in power consumption. We demonstrated the technical feasibility of this method with application prototypes up to 15‐in. SXGA+ (1400 × 1050 pixels) AMLCDs with amorphous‐silicon (a‐Si) thin‐film‐transistor (TFT) technology. In this paper, we provide an explanation of the addressing mechanism in detail and clarify the feasibility with further technical discussion.