This paper presents a system for simultaneous wireless power and data transfer (SWPDT) over a single inductive link. We design the frequency-splitting inductive link to address the trade-off between high power transfer efficiency (PTE) and high data rate (DR). An active rectifier is designed for high power conversion efficiency. Forward data communication is based on frequency-shift keying (FSK) modulation to support high DR transmission while delivering uninterrupted power. Moreover, we proposed low-power FSK demodulation circuits to further improve the energy efficiency of the data demodulation. The system is implemented with 180nm CMOS process and occupies an area of 0.836mm 2 . The post-layout simulation results show that the overall PTE (including the resonant tanks and the active rectifier) of the SWPDT system can be up to 76.5% while delivering 40mW power to the load. Meanwhile, a data rate of 1.11Mbps can be achieved. The power consumption for data demodulation is 69.1µW, showing an energy efficiency of 62.2pJ/bit. The proposed SWPDT system based on a single inductive link shows potential for implantable biomedical applications.INDEX TERMS Simultaneous wireless power and data transfer (SWPDT), frequency splitting, energy efficient, active rectifier, injection lock, shifted limiter.

This paper proposes a 6.78MHz CMOS active rectifier for wireless power transfer (WPT) systems with adaptive hybrid mode (HM) on/off-delay compensation. Both conventional current mode (CM) and voltage mode (VM) delay compensation schemes are discussed in this paper. CM compensation has strengths in compensation accuracy and range but shortcoming in power consumption. VM compensation has an advantage in power consumption but weaknesses in compensation range and accuracy. To find a balance between power loss and compensation range, the proposed active rectifier adopted CM for on-delay compensation and VM for off-delay compensation. Furthermore, by adding sample-based feedback loops to generate offset voltage for comparators adaptively, both on/off delays are well-compensated under different input power and loading conditions. This active rectifier was designed and simulated in SMIC 0.18µm CMOS process with 3.3V devices. By using HM compensation, this active rectifier can improve at least 10% in power loss compared with conventional CM compensation. With output DC voltage ranging from 1.6V to 3V and loading resistor from 200 to 1K , the peak power conversion efficiency (PCE) is 95.4% with 200 loading, peak voltage conversion ratio (VCR) is 97.5% with 500 and maximum output power can reach 45 mW.INDEX TERMS Active rectifier, reverse current, current mode compensation, voltage mode compensation, power conversion efficiency, voltage conversion ratio, wireless power transfer systems.