Over the last 20 years, silicon photonics has revolutionized the field of integrated optics, providing a novel and powerful platform to build mass-producible optical circuits. One of the most attractive aspects of silicon photonics is its ability to provide extremely small optical components, whose typical dimensions are an order of magnitude smaller than those of optical fiber devices. This dimension difference makes the design of fiberto-chip interfaces challenging and, over the years, has stimulated considerable technical and research efforts in the field. Fiber-to-silicon photonic chip interfaces can be broadly divided into two principle categories: in-plane and out-of-plane couplers. Devices falling into the first category typically offer relatively high coupling efficiency, broad coupling bandwidth (in wavelength), and low polarization dependence but require relatively complex fabrication and assembly procedures that are not directly compatible with wafer-scale testing. Conversely, out-of-plane coupling devices offer lower efficiency, narrower bandwidth, and are usually polarization dependent. However, they are often more compatible with high-volume fabrication and packaging processes and allow for on-wafer access to any part of the optical circuit. In this paper, we review the current state-of-the-art of optical couplers for photonic integrated circuits, aiming to give to the reader a comprehensive and broad view of the field, identifying advantages and disadvantages of each solution. As fiber-to-chip couplers are inherently related to packaging technologies and the co-design of optical packages has become essential, we also review the main solutions currently used to package and assemble optical fibers with silicon-photonic integrated circuits.

Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved.

No abstract

No abstract

Rights