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Analysis of time-series data allows to identify long term trends and make predictions that can help to improve our lives. With rapid development of artificial neural networks, long short-tern memory (LSTM) recurrent neural network (RNN) configuration is found to be capable in dealing with time-series forecasting problems where data points are time dependent and possess seasonality trends. Gated structure of LSTM cell and flexibility in network topology (one-to-many, many-to-one, etc) allows to model systems with multiple input variables and control several parameters such as the size of look-back window to make a prediction and number of time steps to be predicted. These make LSTM attractive tool over conventional methods such as auto regression models, simple average, moving average, naive approach, ARIMA, Holts linear trend method, Holts Winter seasonal method, and others. In this paper, we propose a hardware implementation of LSTM network architecture for time-series forecasting problem. All simulations were performed using TSMC 0.18 µm CMOS technology and HP memristor model.

Long Short-Term memory (LSTM) architecture is a well-known approach for building recurrent neural networks (RNN) useful in sequential processing of data in application to natural language processing. The near-sensor hardware implementation of LSTM is challenged due to large parallelism and complexity. We propose a 0.18 m CMOS, μ GST memristor LSTM hardware architecture for near-sensor processing. The proposed system is validated in a forecasting problem based on Keras model.