We show that the temperature dependence of a silicon waveguide can be controlled well by using a slot waveguide structure filled with a polymer material. Without a slot, the amount of temperature-dependent wavelength shift for TE mode of a silicon waveguide ring resonator is very slightly reduced from 77 pm/ degrees C to 66 pm/ degrees C by using a polymer (WIR30-490) upper cladding instead of air upper cladding. With a slot filled with the same polymer, however, the reduction of the temperature dependence is improved by a pronounced amount and can be controlled down to -2 pm/ degrees C by adjusting several variables of the slot structure, such as the width of the slot between the pair of silicon wires, the width of the silicon wire pair, and the height of the silicon slab in our experiment. This measurement proves that a reduction in temperature dependence can be improved about 8 times more by using the slot structure.

We experimentally and theoretically demonstrate subwavelength scale localization of spoof surface plasmon polaritons at a point defect in a two-dimensional groove metal array. An analytical expression for dispersion relation of spoof surface plasmon polaritons substantiates the existence of a band gap where a defect mode can be introduced. A waveguide coupling method allows us to excite localized spoof surface plasmon polariton modes and measure their resonance frequencies. Numerical calculations confirm that localized modes can have a very small modal volume and a high Q factor both of which are essential in enhancing light-matter interactions. Interestingly, we find that the localized spoof surface plasmon polariton has a significant toroidal dipole moment, which is responsible for the high Q factor, as well as an electric quadrupole moment. In addition, the dispersion properties of spoof surface plasmon polaritons are analyzed using a modal expansion method and numerical calculations.

One of the challenges of implementing free-space quantum key distribution (QKD) systems working in daylight is to remove unwanted background noise photons from sunlight. Elaborate elimination of background photons in the spectral, temporal, and spatial domains is an indispensable requirement to decrease the quantum bit error rate (QBER), which guarantees the security of the systems. However, quantitative effects of different filtering techniques and performance optimization in terms of the secure key rate have not been investigated. In this study, we quantitatively analyze how the performance of the QBER and the key rates changes for different combinations of filtering techniques in a free-space BB84 QKD system in daylight. Moreover, we optimize the conditions of filtering techniques in order to obtain the maximum secure key rate.

We demonstrate 3rd order micro-ring filters, 100 GHz-spaced 16 channels and 50 GHz-spaced 32 channels. Fabrication-induced resonant wavelength errors, σ = 0.237 nm, and temperature-dependent wavelength shift, 0.043 nm/°C tolerable to ΔT>10 °C, has been measured on filters based on the fundamental TM mode. The problem of CMOS-compatible photolithography is solved, while maintaining a small radius, R = 9 μm. As some dummy channels are arranged, it is shown that an on-chip optical network for many cores CPU can be constructed by 16 channel ring filters with the currently available technology.

Side channel effects such as temporal disparity and intensity fluctuation of photon pulses caused by random bit generation with multiple laser diodes in high-speed polarization-based BB84 quantum key distribution (QKD) systems can be eliminated by increasing DC bias current condition. However, background photons caused by the spontaneous emission process under high DC bias current degrade the performance of the QKD systems. In this study, we investigated, for the first time, the effects of spontaneously emitted photons on the system performance in a high-speed QKD system at a clock rate of 400 MHz. Also, we further show improvements of system performance without side channel effects by utilizing temporal filtering technique with real-time FPGA signal processing.