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By means of catalytic chemical vapor deposition (CCVD) in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate without the need to transfer graphene layers. In-situ grown MoLGFETs exhibit the expected Dirac point together with the typical low on/off-current ratios. In contrast, BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio up to 1×10 7. The complete fabrication process is silicon CMOS compatible. This will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment

Mutli-level switching in resistive memory devices enables a wide range of computational paradigms, including neuromorphic and cognitive computing. To this end, we have developed a bi-layer tantalum oxide based resistive random access memory device using Hf as the oxygen exchange layer. Multiple, discrete resistance levels were achieved by modulating the RESET pulse width and height, ranging from 2 kΩ to several MΩ. For a fixed pulse height, OFF state resistance was found to increase gradually with the increase in the pulse width, whereas for a fixed pulse width, the increase in the pulse height resulted in drastic changes in resistance. Resistive switching in these devices transitioned from Schottky emission in the OFF state to tunneling based conduction in the ON state, based on I-V curve fitting and temperature dependent current measurements. These devices also demonstrated endurance of more than 108 cycles with a satisfactory Roff/Ron ratio and retention greater than 104 s.

Resistive Random Access Memory (RRAM) is a novel form of non-volatile memory that is expected to play a major role in future computing and memory solutions. It has been shown that the resistance of RRAM devices can be precisely tuned by modulating switching voltages, by limiting peak current, and by adjusting the switching pulse duration. This enables the realization of novel applications such as memristive neuromorphic computing and neural network computing. The RRAM devices described in this work utilize an inert tungsten bottom electrode, hafnium oxide based active switching layer, a titanium oxygen exchange layer, and an inert titanium nitride top electrode. Linear sweep and controlled pulse (down to 10 ns) based electrical characterization of RRAM devices was performed in a 1 transistor 1 RRAM (1T1R) configuration to determine endurance, reliability, retention and threshold voltage parameters. We demonstrated endurance values above 108cycles with an average on/off ratio of 15 and pulse voltages for set/reset operation of ±1.5V. The on-chip 1T1R structures show an excellent controllability with respect to the low and high resistive state by manipulating the peak current from 75 up to 350µA we were able to achieve 10 discrete resistive states. Our results demonstrate that the set operation (which shifts the RRAM device from the high to the low resistance state) is only dependent on the voltage of the switching pulse and the peak current limit. The reset operation, however, occurs in an analog fashion and appears to be dependent on the total energy of the applied switching pulse. Pulse energy was modulated by varying the peak voltage which resulted in a larger relative change of the RRAM device resistance.

Hardware security has emerged as a field concerned with issues such as integrated circuit (IC) counterfeiting, cloning, piracy, and reverse engineering. Physical unclonable functions (PUF) are hardware security primitives useful for mitigating such issues by providing hardware-specific fingerprints based on intrinsic process variations within individual IC implementations. As technology scaling progresses further into the nanometer region, emerging nanoelectronic technologies, such as memristors or RRAMs (resistive random-access memory), have become interesting options for emerging computing systems. In this article, using a comprehensive temperature dependent model of an HfO x (hafnium-oxide) memristor, based on experimental measurements, we explore the best region of operation for a memristive crossbar PUF (XbarPUF). The design considered also employs XORing and a column shuffling technique to improve reliability and resilience to machine learning attacks. We present a detailed analysis for the noise margin and discuss the scalability of the XbarPUF structure. Finally, we present results for estimates of area, power, and delay alongside security performance metrics to analyze the strengths and weaknesses of the XbarPUF. Our XbarPUF exhibits nearly ideal (near 50%) uniqueness, bit-aliasing and uniformity, good reliability of 90% and up (with 100% being ideal), a very small footprint, and low average power consumption ≈104μW.