ABSTRACT:The Izod impact strength of two kinds of ternary composites was investigated. One consisted of polypropylene (PP), the triblock copolymer polystyreneblock-poly(ethylene butene)-block-polystyrene (SEBS), and calcium carbonate (CaCO 3 ) particles, and the other consisted of PP, carboxylated SEBS (C-SEBS), and CaCO 3 particles. The mean size of the CaCO 3 particles was about 160 nm. According to scanning electron microscopy observations, the composite with SEBS showed a morphology in which SEBS domains and CaCO 3 particles were independently dispersed in the PP matrix. On the other hand, the composite with C-SEBS showed a morphology in which CaCO 3 particles were encapsulated by C-SEBS; that is, a core-shell structure was formed. The Izod impact strength of the composite with SEBS was higher than that of the composite with C-SEBS and the PP/SEBS and PP/C-SEBS binary blends. According to observations of the fractured surface, the stress-whitened area was larger in the composite with SEBS than in the composite with C-SEBS and the PP/SEBS and PP/C-SEBS binary blends. The toughening mechanism of the composite, using nanometer-sized CaCO 3 particles in combination with SEBS, was examined.

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A nondestructive readout random access memory (RAM) cell based on the use of Abrikosov vortices in thin-film type-II superconductors is newly designed and experimentally tested. The cell occupies an area of 30×60 μm2 with a 5-μm design rule. Proper memory cell operation is achieved in the so-called 1, −1 mode using the shift saturation effect, which occurs on the shift value characteristics of the sense gate threshold curves as a function of the write currents. This is the first Abrikosov vortex RAM cell to operate properly. The write current level has been reduced one order of magnitude using a Pb/In/Au film co-evaporated at 90 K for the vortex storage region.

We have designed a 16 kbit superconducting latching/SFQ hybrid (SLASH) RAM, which enables high-frequency clock operation up to 10 GHz. The 16 kbit SLASH RAM consists of four 4 × 4 matrix arrays of 256 bit RAM blocks, block decoders, latching block drivers, latching block senses, impedance matched lines and the powering circuits. The 256 bit RAM block is composed of a 16 × 16 matrix array of vortex transitional memory cells, latching drivers, SFQ NOR decoders and latching sense circuits. We have also designed and implemented an SFQ NOR decoder that is composed of magnetically coupled multi-input OR gates and RSFQ inverters.

The transresistance and current gain of high-Tc flux flow transistors were investigated phenomenologically and experimentally in relation to the flux flow characteristics of the devices. It was shown that the transresistance was in proportion to the vortex flow velocity, the channel width, and the magnetic coupling coefficient between the channel and the control current line. The devices were fabricated from thin films of coevaporated NdCeCuO, and the control current dependence of their transresistance was measured. It was found that the transresistance peak appeared at a high control current level that corresponded to the saturation of the flow voltage. The peak value of the transresistance was 1.25 Ω. The flow voltage saturation mechanism is discussed in relation to the channel etching of the devices.