In our previous studies, thin Ti-rich diffusion barrier layers were found to be formed at the interface between Cu(Ti) films and SiO 2 /Si substrates after annealing at elevated temperatures. This technique was called self-formation of the diffusion barrier, and is attractive for fabrication of ultralarge-scale integrated (ULSI) interconnects. In the present study, we investigated the applicability of this technique to Cu(Ti) alloy films which were deposited on low dielectric constant (low-k) materials (SiO x C y ), SiCO, and SiCN dielectric layers, which are potential dielectric layers for future ULSI Si devices. The microstructures were analyzed by transmission electron microscopy (TEM) and secondary-ion mass spectrometry (SIMS), and correlated with the electrical properties of the Cu(Ti) films. It was concluded that the Ti-rich interface layers were formed in all the Cu(Ti)/dielectric-layer samples. The primary factor to control the composition of the self-formed Ti-rich interface layers was the C concentration in the dielectric layers rather than the enthalpy of formation of the Ti compounds (TiC, TiSi, and TiN). Crystalline TiC was formed on the dielectric layers with a C concentration higher than 17 at.%.
Fe, Ni, and Cu atoms diffuse very quickly in Si and are the main targets for metal gettering. W, Hf, and Mo atoms, for example, which diffuse very slowly in Si have also recently become gettering targets in addition to these metals. Therefore, proximity gettering techniques by using ion implantation are also being considered. Not only implanted elements but intrinsic point defects exist and form several complexes after the heat-treatment for Si crystal recovery. This research systematically investigated the binding energy of twelve important metals (Ti, Cr, Mn, Fe, Co, Ni, Cu, Zn, Mo, Hf, Ta, and W) with dopants (B, C, P, As, and F) and their complexes with intrinsic point defects (vacancies (Vs) and self-interstitials (Is)) by using first principles calculation. The database should be useful in designing effective gettering sites for metal impurities partially covering proximity gettering in LSI manufacturing processes.
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