Here we report a breakthrough in the fabrication of a long lifetime transmon qubit. We use tantalum films as the base superconductor. By using a dry etching process, we obtained transmon qubits with a best T1 lifetime of 503 μs. As a comparison, we also fabricated transmon qubits with other popular materials, including niobium and aluminum, under the same design and fabrication processes. After characterizing their coherence properties, we found that qubits prepared with tantalum films have the best performance. Since the dry etching process is stable and highly anisotropic, it is much more suitable for fabricating complex scalable quantum circuits, when compared to wet etching. As a result, the current breakthrough indicates that the dry etching process of tantalum film is a promising approach to fabricate medium- or large-scale superconducting quantum circuits with a much longer lifetime, meeting the requirements for building practical quantum computers.

Maintaining or even improving gate performance with growing numbers of parallel controlled qubits is a vital requirement towards fault-tolerant quantum computing. For superconducting quantum processors, though isolated one-or two-qubit gates have been demonstrated with high-fidelity, implementing these gates in parallel commonly show worse performance. Generally, this degradation is attributed to various crosstalks between qubits, such as quantum crosstalk due to residual inter-qubit coupling. An understanding of the exact nature of these crosstalks is critical to figuring out respective mitigation schemes and improved qubit architecture designs with low crosstalk. Here we give a theoretical analysis of quantum crosstalk impact on simultaneous gate operations in a qubit architecture, where fixed-frequency transmon qubits are coupled via a tunable bus, and sub-100-ns controlled-Z (CZ) gates can be realized by applying a baseband flux pulse on the bus. Our analysis shows that for microwave-driven single qubit gates, the dressing from qubit-qubit coupling can cause nonnegligible cross-driving errors when qubits operate near frequency collision regions. During CZ gate operations, although unwanted near-neighbor interactions are nominally turned off, sub-MHz parasitic next-near-neighbor interactions involving spectator qubits can still exist, causing considerable leakage or control error when one operates qubit systems around these parasitic resonance points. To ensure high-fidelity simultaneous operations, this could rise a request to figure out a better way to balance the gate error from target qubit systems themselves and the error from non-participating spectator qubits. Overall, our analysis suggests that towards useful quantum processors, the qubit architecture should be examined carefully in the context of high-fidelity simultaneous gate operations in a scalable qubit lattice.

High fidelity two-qubit gates are fundamental for scaling up the superconducting qubit number. We use two qubits coupled via a frequency-tunable coupler which can adjust the coupling strength, and demonstrate the CZ gate using two different schemes, adiabatic and diabatic methods. The Clifford based randomized benchmarking (RB) method is used to assess and optimize the CZ gate fidelity. The fidelities of adiabatic and diabatic CZ gates are 99.53(8)% and 98.72(2)%, respectively. We also analyze the errors induced by the decoherence. Comparing to 30 ns duration time of adiabatic CZ gate, the duration time of diabatic CZ gate is 19 ns, revealing lower incoherence error rate r ′ incoherent , int = 0.0197 ( 5 ) compared to r incoherent, int = 0.0223(3).

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Significant progress has been made in building large-scale superconducting quantum processors based on flip-chip technology. In this work, we use flip-chip technology to realize a modified transmon qubit, denoted as the “flipmon,” whose large shunt capacitor is replaced by a vacuum-gap parallel plate capacitor. We place one of the qubit pads and a single Josephson junction on the bottom chip and the other pad on the top chip, which is galvanically connected with the junction through an indium bump. The electric field energy participation ratio can arrive at nearly 53% in air when the vacuum-gap is about 5 μm, thus potentially leading to a lower dielectric loss. The coherence times of the flipmons are obtained in the range of 30–60 μs, which are comparable with that of conventional transmons with similar fabrication processes. The electric field simulation indicates that the metal-air interface's energy participation ratio increases significantly and may dominate the flipmon's decoherence. This suggests that more careful surface treatment needs to be considered. No evidence shows that the indium bumps inside the flipmons cause significant decoherence. With well-designed geometry and good surface treatment, the coherence of the flipmons can be further improved.