Solution processing is a scalable means of depositing large-area electronics for applications in displays, sensors, smart windows, and photovoltaics. However, solution routes typically yield films with electronic quality inferior to traditional vacuum deposition, as the solution precursors contain excess organic ligands, counterions, and/or solvent that leads to porosity in the final film. We show that electrolysis of aq. mixed metal nitrate salt solutions drives the formation of indium gallium zinc oxide (IGZO) precursor solutions, without purification, that consist of ∼1 nm radii metal−hydroxo clusters, minimal nitrate counterions, and no organic ligands. Films deposited from cluster precursors over a wide range of composition are smooth (roughness of 0.24 nm), homogeneous, dense (80% of crystalline phase), and crack-free. The transistor performance of IGZO films deposited from electrochemically synthesized clusters is compared to those from the starting nitrate salt solution, sol−gel precursors, and, as a control, vacuum-sputter-deposited films. The average channel mobility (μ AVE ) of air-annealed cluster films (In:Ga:Zn = 69:12:19) at 400°C was ∼9 cm 2 V −1 s −1 , whereas those of control nitrate salt and sol−gel precursor films were ∼5 and ∼2 cm 2 V −1 s −1 , respectively. By incorporating an ultrathin indium−tin−zinc oxide interface layer prior to IGZO film deposition and airannealing at 550°C, a μ AVE of ∼30 cm 2 V −1 s −1 was achieved, exceeding that of sputtered IGZO control films. These data show that electrochemically derived cluster precursors yield films that are structurally and electrically superior to those deposited from metal nitrate salt and related organic sol−gel precursor solutions and approach the quality of sputtered films.

Amorphous LaAlO3 dielectric thin films were fabricated via solution processing from inorganic nitrate precursors. Precursor solutions contained soluble oligomeric metal-hydroxyl and/or -oxo species as evidenced by dynamic light scattering (DLS) and Raman spectroscopy. Thin-film formation was characterized as a function of annealing temperature using Fourier transform infrared (FTIR), X-ray diffraction (XRD), X-ray reflectivity (XRR), scanning electron microscopy (SEM), and an array of electrical measurements. Annealing temperatures ≥500 °C result in thin films with low leakage-current densities (∼1 × 10(-8) A·cm(-2)) and dielectric constants ranging from 11.0 to 11.5. When incorporated as the gate dielectric layer in a-IGZO thin-film transistors (TFTs), LaAlO3 thin films annealed at 600 °C in air yielded TFTs with relatively low average mobilities (∼4.5 cm(2)·V(-1)·s(-1)) and high turn-on voltages (∼26 V). Interestingly, reannealing the LaAlO3 in 5%H2/95%N2 at 300 °C before deposition of a-IGZO channel layers resulted in TFTs with increased average mobilities (11.1 cm(2)·V(-1)·s(-1)) and lower turn-on voltages (∼6 V).

In an enhancement-mode, n-channel (p-channel) oxide thin-film transistor (TFT), current arises as a consequence of electron (hole) transport within a narrow accumulation layer. The square-law model accurately describes enhancement-mode TFT behavior and establishes the equations appropriate for carrier mobility extraction. In contrast, in a depletion-mode oxide TFT, carrier transport can occur within an accumulation layer and/or within the 'bulk' portion of the channel. The comprehensive depletion-mode model accurately describes depletion-mode TFT behavior and establishes a set of equations, different from those obtained from squarelaw theory, which can be used for carrier mobility extraction. Simulation reveals that when square-law theory mobility extraction equations are used to assess depletion-mode TFTs, the estimated interface mobility is often overestimated. We recently proposed a general procedure for the electrical characterization of oxide thin-film transistors (TFTs).1 This procedure was advanced so that future researchers are able to avoid common measurement artifacts which would render their oxide TFT electrical assessment unreliable. The intent of the present contribution is to warn of another measurement artifact -mobility overestimation when evaluating a depletion-mode TFT -and to elucidate the subtle nature of this effect via simulation.As typically defined, the gate turn-on (V ON ) and threshold voltage (V T ) of a depletion-mode TFT are negative (positive) for an n-channel (p-channel) TFT. This means that mobile carriers (electrons or holes) are present in the channel even when no gate voltage is applied. Depending on the polarity, an applied voltage can either enhance or deplete the concentration of carriers in the channel of a depletionmode TFT. When the carrier concentration is enhanced by the applied gate voltage, these additional carriers are induced into an accumulation layer existing in close physical proximity to the gate insulator. Thus, two kinds of carriers -interface and 'bulk' -contribute to current in a depletion-mode TFT. The mobility of an interface carrier is expected to be less than the mobility of a 'bulk' carrier due to interface roughness and other types of interface scattering. These considerations, it turns out, often lead to depletion-mode TFT mobility overestimation artifacts since carriers being transported in the 'bulk' (with higher mobility) are inadvertency included in the estimation of gate voltage-induced interface transport.Elucidation of depletion-mode TFT mobility overestimation artifacts is accomplished by simulation of TFT current -voltage (I-V) characteristics using the comprehensive depletion-mode model.2 This model was originally developed for n-channel TFTs. However, we extend and refine this model to p-channel TFT behavior and employ it for the assessment of p-channel oxide TFTs since this topic has elicited a significant amount of recent interest. 3-21 TFT ModelingTransfer curves and corresponding energy band diagrams distinguishing between enhancement-a...