Effectively removing dissipated heat from the switching devices enables a higher current carrying capability per chip area ratio, thus leading to smaller or fewer devices for a given power requirement specification. Further, the use of SiC based devices has proven to increase the efficiency of the system thereby reducing the dissipated heat. Thermal models have been used to compare SiC power modules. Single and double sided cooling have been simulated. The simulated maximum temperatures were 141 °C for the single sided version and 119.7 °C for the double sided version. In addition, the reliability of a single sided module and thermally induced plastic strains of a double sided module have been investigated. A local model of the wire bond interface to the transistor metallization shows a 30/00 maximum increase in plastic strain during the power cycle. Simulations of the creep strain rates in the die attach solder layer for a power cycling loads also shows a 30/00 increase in creep strain per cycle
In this paper a strategy for the integration of boundary condition independent (BCI) thermal compact models in board-level static thermal finite element (FE) analyses of printed wiring assemblies (PWA) is presented. This concept is an integral part of a software development project for automatic investigation of solder joint fatigue of surface mount devices (SMT). The overall automation process comprises data capture for PWA, layout data repair and session control for finite element analysis (FEA).Solder joint fatigue results from thermo-mechanical stresses. For this reason both board-and component-level thermal simulations are needed. Among other component descriptions BCI thermal compact models can be automatically incorporated into FE models replacing detail FE modeling of IC packages. This approach has been investigated in various test examples. A further application of this approach to transient simulations seems to be possible.
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